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ORSPI4-1FN1156C Datasheet(PDF) 3 Page - Lattice Semiconductor |
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ORSPI4-1FN1156C Datasheet(HTML) 3 Page - Lattice Semiconductor |
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3 / 263 page  Lattice Semiconductor ORCA ORSPI4 Data Sheet 3 ORSPI4 Overview The ORSPI4 FPSC provides two SPI4.2 interface blocks, a Memory Controller and a 4-channel SERDES block, combined with FPGA logic. Based on the 1.5 V OR4E06 ORCA FPGA, it has a 46 x 44 array of Programmable Logic Cells (PLCs). The embedded core is attached to the right side of the device, as shown below, and is inte- grated directly into the FPGA array. A top level diagram of the basic chip configuration is shown in Figure 1. Figure 1. ORSPI4 Basic Chip Configuration Each of the logic blocks in the embedded core is functionally independent from the other blocks. Connections between blocks must be made through the FPGA logic. However, one of the SPI4 blocks and the SERDES block share I/Os. Hence the device may be configured to provide either two SPI4 interfaces or one SPI4 interface and one serial interface. What Is an FPSC? FPSCs, or Field-Programmable System Chips, are devices that combine field-programmable logic with ASIC or mask-programmed logic on a single device. FPSCs provide the time to market and the flexibility of FPGAs, the design effort savings of soft Intellectual Property (IP) cores, and the speed, design density, and economy of ASICs. FPSC Overview Lattice’s Series 4 FPSCs are created from Series 4 ORCA FPGAs. To create a Series 4 FPSC, several columns of Programmable Logic Cells are integrated with an embedded logic core. Other than replacing some FPGA gates with ASIC gates, at greater than 10:1 area efficiency, none of the FPGA functionality is changed—all of the Series 4 FPGA capability is retained including the Embedded Block RAMs, MicroProcessor Interface (MPI), boundary scan, etc. Pins from the replaced columns of programmable logic are used as I/O pins for the embedded core. The remainder of the device pins retain their FPGA functionality. FPSC Gate Counting The total gate count for an FPSC is the sum of its embedded core (standard-cell/ASIC gates) and its FPGA gates. Because FPGA gates are generally expressed as a usable range with a nominal value, the total FPSC gate count is sometimes expressed in the same manner. Standard-cell ASIC gates are, however, 10 to 25 times more silicon- ORCA 4E06-Based Programmable Logic Embedded Core SPI4.2 I/F SPI4.2 I/F Memory Quad SERDES Controller |
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