Block diagram & pins description

L6219R

6/16

Note:

ESD on GND, Vs, Vss, OUT 1A and OUT 2A is guaranteed up to 1.5KV (Human Body

Model, 1500W, 100pF).

7;18

GROUND

Ground Connection. With pins 6 and 19 also conducts heat from die to

printed circuit copper.

8;20

INPUT 0

See INPUT 1 (pins 9;17)

9;17

INPUT 1

These pins and pins 8;20 (INPUT 0) are logic inputs which select the

outputs of the comparators to set the current level. Current also depends

on the sensing resistor and reference voltage. See Funcional

Description.

10;16

PHASE

This TTL-compatible logic inputs sets the direction of current flow through

the load. A high level causes current to flow from OUTPUT A (source) to

OUTPUT B (sink). A schmitt trigger on this input provides good noise

immunity and a delay circuit prevents output stage short circuits during

switching.

11;15

REFERENCE

VOLTAGE

A voltage applied to this pin sets the reference voltage of the

comparators, this determining the output current (also thus depending on

Rs and the two inputs INPUT 0 and INPUT 1).

12;14

RC

A parallel RC network connected to this pin sets the OFF time of the

higher power transistors. The pulse generator is a monostable triggered

by the output of the comparators (toff = 1.1 RT CT).

13

Vss - LOGIC

SUPPLY

Supply Voltage Input for Logic Circuitry

24

Vs - LOAD

SUPPLY

Supply Voltage Input for the Output Stages.

Table 1.

Pin description (continued)

Pin #

Name

Description