UCC1895

UCC2895

UCC3895

SLUS157L − DECEMBER 1999 − REVISED APRIL 2008

5

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CVDD = 0.1 µF and no load on the outputs, TA = TJ. TA = 0°C to 70°C for UCC3895x, TA = −40°C to 85°C for UCC2895x and TA = −55°C to 125°C

for the UCC1895x. (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

CURRENT SENSE

ICS(bias)

Current sense bias current

0 V < CS < 2.5 V,

0 V ADS < 2.5 V

−4.5

20

µA

Peak current threshold

1.90

2.00

2.10

V

Overcurrent threshold

2.4

2.5

2.6

V

Current sense to output delay

0V

≤ CS ≤ 2.3 V,

DELAB=DELCD=REF

75

110

ns

SOFT-START/SHUTDOWN

ISOURCE

Softstart source current

SS/DISB = 3.0 V,

CS = 1.9 V

−40

−35

−30

µA

ISINK

Softstart sink current

SS/DISB = 3.0 V,

CS = 2.6 V

325

350

375

µA

Softstart/disable comparator threshold

0.44

0.50

0.56

V

ADAPTIVE DELAY SET (ADS)

DELAB/DELCD output voltage

ADS = CS = 0 V

0.45

0.50

0.55

V

DELAB/DELCD output voltage

ADS = 0 V,

CS = 2.0 V

1.9

2.0

2.1

V

tDELAY

Output delay(1)(3)

ADS = CS = 0 V

450

560

620

ns

ADS bias current

0 V < ADS < 2.5 V,

0 V < CS < 2.5 V

−20

20

µA

OUTPUT

VOH

High−level output voltage (all outputs)

IOUT = −10 mA,

VDD to output

250

400

mV

VOL

Low-level output voltage (all outputs)

IOUT = 10 mA

150

250

mV

Rise time(1)

CLOAD = 100 pF

20

35

ns

Fall time(1)

CLOAD = 100 pF

20

35

ns

(1) Ensured by design. Not production tested.

(2) Minimum phase shift is defined as:

F + 180

t

t

PERIOD

or

F + 180

t

t

PERIOD

where

(3) Output delay is measured between OUTA/OUTB or OUTC/OUTD. Output delay is defined as shown below where:

t

PERIOD

OUTA

OUTC

OUTA

OUTB

Same applies to OUTB and OUTD

Same applies to OUTC and OUTD

tDELAY = tf(OUTC) − tf(OUTA)

tDELAY = tR(OUTB) − tf(OUTA)