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ADS6129IRGZR Datasheet(PDF) 8 Page - Texas Instruments |
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ADS6129IRGZR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 68 page  ELECTRICAL CHARACTERISTICS – ADS614x and ADS612x ADS6149/ADS6129 ADS6148/ADS6128 SLWS211B – JULY 2008 – REVISED OCTOBER 2008 ..................................................................................................................................................... www.ti.com Typical values are at 25°C, AVDD = 3.3 V, DRVDD = 1.8 V, 50% clock duty cycle, –1dBFS differential analog input, internal reference mode unless otherwise noted. Min and max values are across the full temperature range TMIN = –40°C to TMAX = 85°C, AVDD = 3.3 V, DRVDD = 1.8 V ADS6149/ADS6129 ADS6148/ADS6128 210 MSPS 250 MSPS PARAMETER UNIT MIN TYP MAX MIN TYP MAX Fin = 20 MHz 92 92 Fin = 80 MHz 86 82 SFDR Fin = 100 MHz 85 81 dBc Spurious Free Dynamic Range Fin = 170 MHz 74 82 74 83 Fin = 300 MHz 76 76 Fin = 10 MHz 89 88.5 Fin = 20 MHz 83 80 THD Fin = 80 MHz 82 79 dBc Total Harmonic Distortion Fin = 170 MHz 71 79 71 80 Fin = 300 MHz 73 73 Fin = 20 MHz 94 94 Fin = 80 MHz 90 88 HD2, Fin = 100 MHz 88 88 dBc Second Harmonic Distortion Fin = 170 MHz 74 84 74 84 Fin = 300 MHz 76 76 Fin = 20 MHz 93 92 Fin = 80 MHz 86 82 HD3 Fin = 100 MHz 85 81 dBc Third Harmonic Distortion Fin = 170 MHz 74 82 74 83 Fin = 300 MHz 76 76 Fin = 20 MHz 96 96 Fin = 80 MHz 94 94 Worst Spur Fin = 100 MHz 94 94 dBc Other than second, third harmonics Fin = 170 MHz 92 92 Fin = 300 MHz 90 90 F1 = 46 MHz, F2 = 50 MHz, 94 95 Each tone at –7 dBFS IMD dBFS 2-Tone inter-modulation distortion F1 = 185 MHz, F2 = 190 MHz, 90 90 Each tone at –7 dBFS Recovery to within 1% (of final value) for clock Input overload recovery 1 1 6-dB overload with sine wave input cycles PSRR For 100 mVPP signal on AVDD supply 25 25 dB AC power supply rejection ratio 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ADS6149/ADS6129 ADS6148/ADS6128 |
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