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PM8834TR Datasheet(PDF) 7 Page - STMicroelectronics |
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PM8834TR Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 18 page PM8834 Device description and operation 7/18 4 Device description and operation PM8834 is a dual low side driver suitable for charging and discharging large capacitive loads like MOSFETs or IGBTs used in power supplies and DC/DC modules. PM8834 can sink and source 4 A on both low side driver branch but higher driving current can be obtained by paralleling its outputs. Even though this device has been designed to cope with loads requiring high peak current and fast switching time, the ultimate driving capability depends on the power dissipation in the device which must be kept below the power dissipation capability of the package. This aspect will be discussed in Section 5.2. For enhanced control of operation PM8834 make provision of dual independent active high enable pins (ENABLE_1 and ENABLE_2). Connecting those pin to GND pin, will disable the corresponding low side driver. PM8834 uses the VCC pin for supply and GND pin for return. The dual low-side driver has been design to work with supply voltage in the range of 5 to 18 V. Before VCC overcome the UVLO threshold (UVLOVCC), PM8834 keeps firmly-OFF both low- side MOSFETs then, after the UVLO has crossed, the PWM input keeps the control of the driver operations provided that the corresponding enable pin is active. Both PWM_1 and PWM_2 are internally pulled down so if left floating the corresponding output pins are discharged. Input pins (PWM_1, PWM_2, ENABLE_1 and ENABLE_2) are CMOS/TTL compatible with capability to work also with voltages up to VCC. 4.1 Input stage 4.1.1 PWM inputs The input of the PM8834 dual low side driver are compatible to CMOS/TTL levels with capability to be pulled up to VCC. The relation between the input pins (PWM_1, PWM_2) and the corresponding PWM output is depicted in Figure 3. In the worst case, input levels above 2.5 V are recognized as high voltage and value below 0.8 V are recognized as low logic value. Propagation delays for high-low (tD_HL) and low-high (tD_LH) and rise (tR) and fall (tR) times have been designed to ensure operation in fast switching environment. Matching between delays in the two branches of the PM8834 ensure symmetry in the operations and allows parallel output functionality. Each PWM input feature 10 μA pulldown to default OFF the status of the external MOSFET / IGBT. |
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