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LNBH24 Datasheet(PDF) 8 Page - STMicroelectronics

Part # LNBH24
Description  Dual LNB supply and control IC with step-up and I짼C interface
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LNBH24 Datasheet(HTML) 8 Page - STMicroelectronics

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Introduction
LNBH24
8/30
22.75 V (VUP=VOUT+0.75 V typ.) independent of the VSEL/LLC bits status. If the AUX
function is used to force the VOUT to 22 V, it is recommended to set the AUX bit to LOW as
soon as the minimum current test phase is expired, so that the VOUT voltage will be
controlled again as per the VSEL/LLC bits status. In order to avoid false triggering, the
IMON function must be used only with the 22 kHz tone transmission deactivated (TEN=0
and DSQIN=LOW), otherwise the IMON bit could be set to 0 even if the output current is
below the minimum current thresholds (6 mA or 12 mA).
2.12
Output current limit selection
The linear regulator current limit threshold can be set through an external resistor connected
to ISEL pin. The resistor value defines the output current limit by the equation:
IMAX(A) = 10000/RSEL
where RSEL is the resistor connected between ISEL and GND. The highest selectable
current limit threshold is 1.0 A typ with RSEL=10 kΩ. The above equation defines the typical
threshold value for each output. However, it is suggested not to exceed for an extended
period a total of current of 1 A from both sections (IOUT_A + IOUT_B < 1 A) in order to avoid
triggering the over-temperature protection.
2.13
Over-current and short-circuit protection and diagnostic
In order to reduce the total power dissipation during an overload or a short-circuit condition,
the device is provided with a dynamic short-circuit protection. It is possible to set the short-
circuit current protection either statically (simple current clamp) or dynamically through the
PCL bit of the I²C SR. When the PCL (pulsed current limiting) bit is set to LOW, the over-
current protection circuit works dynamically: as soon as an overload is detected, the output
is shut down for a time TOFF, typically 900 ms. Simultaneously the diagnostic OLF I²C bit of
the system register is set to "1". After this time has elapsed, the output is resumed for a time
TON = (1/10) TOFF = 90 ms (typ.). At the end of TON, if the overload is still detected, the
protection circuit will cycle again through TOFF and TON. At the end of a full TON in which no
overload is detected, normal operation is resumed and the OLF diagnostic bit is reset to
LOW. Typical TON+TOFF time is 990 ms and an internal timer determines it. This dynamic
operation can greatly reduce the power dissipation in short-circuit condition, still ensuring
excellent power-on start-up in most conditions. However, there could be some cases in
which a highly capacitive load on the output may cause a difficult start-up when the dynamic
protection is chosen. This can be solved by initiating any power start-up in static mode
(PCL=1) and then switching to the dynamic mode (PCL=0) after a chosen amount of time
depending on the output capacitance. When in static mode, the diagnostic OLF bit goes to
"1" when the current clamp limit is reached and returns LOW when the overload condition is
cleared.
2.14
Thermal protection and diagnostic
The LNBH24 is also protected against overheating. When the junction temperature exceeds
150 °C (typ.), the step-up converter and the liner regulator are shut off, and the diagnostic
OTF SR bit is set to "1". Normal operation is resumed and the OTF bit is reset to LOW when
the junction is cooled down to 135 °C (typ.).
Note:
External components are needed to comply to bi-directional DiSEqCbus hardware
requirements. Full compliance of the whole application with DiSEqCspecifications is not
implied by the use of this IC. NOTICE: DiSEqCis a trademark of EUTELSAT.


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