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HD74LVC1G58 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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HD74LVC1G58 Datasheet(HTML) 3 Page - Renesas Technology Corp |
3 / 10 page HD74LVC1G58 Rev.3.00 Jun. 29, 2004 page 3 of 9 Function Selection Table Logic Function Figure No. 2–inputs AND with one input inverted 2, 3 2–inputs NAND 1 2–inputs NAND with both inputs inverted 4 2–inputs OR 4 2–inputs OR with both inputs inverted 1 2–inputs NOR with one input inverted 2, 3 2–inputs EX–OR 5 Logic Configurations Y Y A A B A B 1 (IN1) (IN2) 6 2 (GND) (VCC) 5 3 (IN0) (Y) 4 B VCC Y Y Y A A B A B 1 (IN1) (IN2) 6 2 (GND) (VCC) 5 3 (IN0) (Y) 4 B VCC Y Figure 1. 2–inputs NAND Gate Y Y A A B A B 1 (IN1) (IN2) 6 2 (GND) (VCC) 5 3 (IN0) (Y) 4 B VCC Y Figure 2. 2–inputs AND Gate with A input inverted Figure 4. 2–inputs OR Gate Figure 3. 2–inputs AND Gate with B input inverted Y A A B 1 (IN1) (IN2) 6 2 (GND) (VCC) 5 3 (IN0) (Y) 4 B VCC Y Figure 5. 2–inputs EX–OR Gate Y Y A A B A B 1 (IN1) (IN2) 6 2 (GND) (VCC) 5 3 (IN0) (Y) 4 B VCC Y |
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