HN58X2402SI/HN58X2404SI

Rev.4.00, Jul.13.2005, page 7 of 17

Device Address (A0, A1, A2)

Up to eight devices for 2k, four devices for 4k, can be addressed on the same bus by setting the levels on these pins to

different combinations. The levels on these pins are compared with the device address code which are input through

The device reads these pins as Low if unconnected. As for 4k, it is unnecessary for the A0 pin to be connected because

the corresponding device address code is used as memory address a8.

Pin Connections for A0 to A2

Pin connection

Memory size

Max connect

number

A2

A1

A0

Notes

2k bit

8

×*

1

×*

1

×*

1

4k bit

4

×*

1

×*

1

×*

1

Use A0 for memory address a8

Notes: 1.

× = Don’t care (Open is also approval).

Write Protect (WP)

When the Write Protect pin (WP) is high, the write protections feature is enabled and operates as shown in the

following table. When the WP is low, write operations for all memory array are allowed. The read operation is always

memory array are allowed if unconnected.

Write Protect Area

Write protect area

WP pin status

2k bit

4k bit

Entire (2k bit)

Entire (4k bit)

Normal read/write operation