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HN58X2504FPIAG Datasheet(PDF) 5 Page - Renesas Technology Corp |
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HN58X2504FPIAG Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 22 page  HN58X2502IAG/HN58X2504IAG Rev.1.00, Nov.16.2006, page 5 of 20 AC Characteristics Test Conditions • Input pules levels: V IL = VCC × 0.2 V IH = VCC × 0.8 • Input rise and fall time: ≤ 10 ns • Input and output timing reference levels: V CC × 0.3, V CC × 0.7 • Output reference levels: V CC × 0.5 • Output load: 100 pF (Ta = −40 to +85°C, V CC = 2.5 V to 5.5 V) Parameter Symbol Alt Min Max Unit Notes Clock frequency fC fSCK 5 MHz S active setup time tSLCH tCSS1 90 ns S not active setup time tSHCH tCSS2 90 ns S deselect time tSHSL tCS 90 ns S active hold time tCHSH tCSH 90 ns S not active hold time tCHSL 90 ns Clock high time tCH tCLH 90 ns 1 Clock low time tCL tCLL 90 ns 1 Clock rise time tCLCH tRC 1 µs 2 Clock fall time tCHCL tFC 1 µs 2 Data in setup time tDVCH tDSU 20 ns Data in hold time tCHDX tDH 30 ns Clock low hold time after HOLD not active tHHCH 70 ns Clock low hold time after HOLD active tHLCH 40 ns Clock high setup time before HOLD active tCHHL 60 ns Clock high setup time before HOLD not active tCHHH 60 ns Output disable time tSHQZ tDIS 100 ns 2 Clock low to output valid tCLQV tV 70 ns Output hold time tCLQX tHO 0 ns Output rise time tQLQH tRO 50 ns 2 Output fall time tQHQL tFO 50 ns 2 HOLD high to output low-Z tHHQX tLZ 50 ns 2 HOLD low to output high-Z tHLQZ tHZ 100 ns 2 Write time tW tWC 5 ms Erase / Write Endurance 10 6 cycles 3 Notes: 1. tCH + tCL ≥ 1/fC 2. Value guaranteed by characterization, not 100 % tested in production. 3. Value guaranteed by characterization, not 100 % tested in products (Ta = 25°C). |
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