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HD74LS245P Datasheet(PDF) 1 Page - Renesas Technology Corp |
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HD74LS245P Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 6 page Rev.3.00, Jul.15.2005, page 1 of 5 HD74LS245 Octal Bus Transceivers (with three-state outputs) REJ03D0464–0300 Rev.3.00 Jul.15.2005 This octal bus transceiver is designed for synchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction control (DIR) input. The enable input ( G) can be used to disable the device so that the buses are effectively isolated. Features • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS245P DILP-20 pin PRDP0020AC-B (DP-20NEV) P — HD74LS245FPEL SOP-20 pin (JEITA) PRSP0020DD-B (FP-20DAV) FP EL (2,000 pcs/reel) HD74LS245RPEL SOP-20 pin (JEDEC) PRSP0020DC-A (FP-20DBV) RP EL (1,000 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement (Top view) VCC GND DIR A1 A2 A3 A4 A5 A6 A7 A8 Enable G B2 B1 B3 B5 B4 B6 B8 B7 20 17 18 19 15 16 1 2 3 4 5 6 7 14 8 9 10 11 12 13 |
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