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R1EX25002ASA00A Datasheet(PDF) 10 Page - Renesas Technology Corp |
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R1EX25002ASA00A Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 22 page R1EX25002Axx00A/R1EX25004Axx00A REJ03C0357-0001 Rev. 0.01 Jan.25.2008 page 10 of 20 Write Enable (WREN): The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write Enable instruction to the device. As shown in the following figure, to send this instruction to the device, chip select ( S) is driven low, and the bits of the instruction byte are shifted in, on serial data input (D). The device then enters a wait state. It waits for the device to be deselected, by chip select ( S) being driven high. Write Enable (WREN) Sequence S W C D Q Instruction 01 2 3 4 5 6 High-Z VIH VIL VIH VIL VIH VIL VIH VIL 7 |
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