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M38586G9-XXXSP Datasheet(PDF) 9 Page - Renesas Technology Corp |
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M38586G9-XXXSP Datasheet(HTML) 9 Page - Renesas Technology Corp |
9 / 77 page Rev.1.10 Apr 3, 2006 page 9 of 75 REJ03B0139-0110 3858 Group [CPU Mode Register (CPUM)] 003B16 The CPU mode register contains the stack page selection bit, etc. The CPU mode register is allocated at address 003B16. Fig. 7 Structure of CPU mode register CPU mode register (CPUM : address 003B16) b7 b0 Stack page selection bit 0 : 0 page 1 : 1 page Fix this bit to “1”. Processor mode bits b1 b0 0 0 : Single-chip mode 0 1 : 1 0 : Not available 1 1 : Port XC switch bit 0 : I/O port function (stop oscillating) 1 : XCIN–XCOUT oscillating function Main clock (XIN–XOUT) stop bit 0 : Oscillating 1 : Stopped Main clock division ratio selection bits b7 b6 0 0 : φ = f(XIN)/2 (high-speed mode) 0 1 : φ = f(XIN)/8 (middle-speed mode) 1 0 : φ = f(XCIN)/2 (low-speed mode) 1 1 : Not available 1 |
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