Electronic Components Datasheet Search |
|
M38D24FAXXXFP Datasheet(PDF) 6 Page - Renesas Technology Corp |
|
M38D24FAXXXFP Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 136 page Rev.3.02 Apr 10, 2008 Page 6 of 131 REJ03B0177-0302 38D2 Group Table 3 Pin description (2) Pin Name Function Function except a port function P60/CNTR1 I/O port P6 • .3-bit I/O port. • CMOS compatible input level. • CMOS 3-state output structure. • I/O direction register allows each pin to be individually programmed as either input or output. • Pull-up control is enabled in 3-bit unit • Timer Y function pins P61/XCIN P62/XCOUT • Sub clock generating circuit I/O pins (oscillator connected) OSCSEL (Only QzROM version) Oscillation start selection pin • Whether oscillation starts by an oscillator between the XIN and XOUT pins or an on-chip oscillator is selected. •VPP power source input pin in the QzROM writing mode. CNVSS (Only flash memory version) CNVSS • Pin for controlling the operating mode of the chip. Connect to VSS. VREF Analog reference voltage • Reference voltage input pin for A/D converter. AVSS Analog power source • Analog power source input pin for A/D converter. Connect to VSS. |
Similar Part No. - M38D24FAXXXFP |
|
Similar Description - M38D24FAXXXFP |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |