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M37481M4T-XXXSP Datasheet(PDF) 10 Page - Renesas Technology Corp |
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M37481M4T-XXXSP Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 98 page 9 MITSUBISHI MICROCOMPUTERS 7480/7481 GROUP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. VCC, VSS AVSS VREF _____ RESET P00 – P07 P10 – P17 PIN DESCRIPTION Table 3. Pin description Clock input Clock output XIN XOUT Input Output Input Input I/O I/O Power source Analog power source input Reference voltage input Reset input I/O port P0 I/O port P1 P20 – P27 Apply a voltage of 2.7 to 5.5 V to VCC and 0 V to VSS. Ground level input pin for A-D converter. Apply the same voltage as Vss. (This pin is for 44P6N-A package only.) Reference voltage input pin for A-D converter. (When the A-D converter is not used, connect it to VCC.) Reset input pin active “L”. These are I/O pins for the internal clock generating circuit of the main clock. To control the generating frequency, an external ceramic is connected between the XIN and XOUT pins. If an external clock is used, the clock source should be connected to the XIN pin, and the XOUT pin should be left open. The feedback resistor is connected between XIN and XOUT. 8-bit I/O port. The output structure is CMOS output. When this port is selected for input, pull-up transistors can be connected in units of 1 bit, and a key-on wake-up function is provided. 8-bit I/O port. The output structure is CMOS output. When this port is selected for input, pull-up transistors can be connected in units of 4 bits. P12 and P13 are in common with timer output pins T0 and T1. P14, P15, P16 and P17 are in common with serial I/O pins RXD, TXD, SCLK and ____ SRDY, respectively. 8-bit input port. (Only 4 bits of P20 to P23 for the 7480 group) or analog input pins IN0 to IN7 (IN0 to IN3 for the 7480 group). Input port P2 Input 4-bit input port. P30 and P31 can be configured to serve as external interrupt input pins INT0 and INT1. 4-bit I/O port. (2 bits of P40 and P41 for the 7480 group). The output structure is N-channel open drain output, having a built-in clamp diode. P40 and P41 can be configured to serve as timer I/O pins CNTR0 and CNTR1. 4-bit I/O port. (This port is not included in the 7480 group.) The output structure is N-channel open drain output, having built-in clamp diodes. P30 – P33 Input port P3 P40 – P43 P50 – P53 I/O port P4 I/O port P5 I/O I/O Input Pin Name Functions Input/ output |
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