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M37471M8-XXXFP Datasheet(PDF) 9 Page - Renesas Technology Corp |
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M37471M8-XXXFP Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 47 page  8 7470/7471 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The 7470/7471 group uses the standard 740 family instruction set. Refer to the table of 740 family addressing modes and machine in- structions or the SERIES 740 <Software> User’s Manual for details on the instruction set. Machine-resident 740 family instructions are as follows: The FST and SLW instruction cannot be used. The MUL, DIV, WIT, and STP instruction can be used. CPU Mode Register The CPU mode register is allocated at address 00FB16. This register contains the stack page selection bit. Fig. 1 Structure of CPU mode register These bits must always be set to “0”. P50, P51/XCIN, XCOUT selection bit (Note 2) 0 : P50, P51 1 : XCIN, XCOUT XCOUT drive capacity selection bit (Note 2) 0 : Low 1 : High Clock (XIN-XOUT) stop bit (Note 2) 0 : Oscillates 1 : Stops Internal system clock selection bit (Note 2) 0 : XIN-XOUT selected (normal mode) 1 : XCIN-XCOUT selected (low-speed mode) CPU mode register (Address 00FB 16) b7 b0 Stack page selection bit (Note 1) 0 : In page 0 area 1 : In page 1 area 1 : In the M37470M2, M37470M4/E4, M37471M2, M37471M4/E4, set this bit to “0”. 2 : In the 7470 group, set this bit to “0”. Notes |
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