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M38866E4-XXXHP Datasheet(PDF) 7 Page - Renesas Technology Corp |
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M38866E4-XXXHP Datasheet(HTML) 7 Page - Renesas Technology Corp |
7 / 111 page 6 3886 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS P51/INT20 /S0 P52/INT30 /R P53/INT40 /W Functions Name Pin P40/XCOUT P41/XCIN I/O port P4 •8-bit I/O port with the same function as port P0. <Input level> P40, P41 : CMOS input level P42–P46 : CMOS compatible input level or TTL in- put level P47 : CMOS compatible input level or TTL input level in the bus interface function <Output structure> P40, P41, P47 : CMOS 3-state output structure P42–P46 : CMOS 3-state output structure or N- channel open-drain output structure •Regardless of input or output port, P42 to P46 can be input every pin level. •When P42 and P43 are used as output port, the function which makes P42 and P43 clear to “0” when the host CPU reads the output data bus buffer 0 can be added. •8-bit I/O port with the same function as port P0. •CMOS compatible input level. •CMOS 3-state output structure. •P50 to P53 can be switched between CMOS com- patible input level or TTL input level in the bus interface function. Function except a port function Table 2 Pin description (2) •Sub-clock generating circuit I/O pins (Connect a resonator.) P42/INT0 /OBF00 P43/INT1 /OBF01 P44/RxD P45/TxD P46/SCLK1 /OBF10 P47/SRDY1 /S1 P50/A0 P54/CNTR0 P55/CNTR1 P56/DA1 /PWM01 P57/DA2 /PWM11 P60/AN0– P67/AN7 P70/SIN2 P71/SOUT2 P72/SCLK2 P73/SRDY2 /INT21 P74/INT31 P75/INT41 P76/SDA P77/SCL P80/DQ0– P87/DQ7 I/O port P5 I/O port P6 I/O port P7 I/O port P8 •8-bit I/O port with the same function as port P0. •CMOS compatible input level. •CMOS 3-state output structure. •8-bit I/O port with the same function as port P0. P70–P75 : CMOS compatible input level or TTL in- put level P76, P77 : CMOS compatible input level or SMBUS input level in the I2C-BUS inter- face function, N-channel open-drain output structure •Regardless of input or output port, P70 to P75 can be input every pin level. •8-bit I/O port with the same function as port P0. •CMOS compatible input level. •CMOS 3-state output structure. •CMOS compatible input level or TTL input level in the bus interface function. •Interrupt input pins •Bus interface function pins •Serial I/O1 function pins •Serial I/O1 function pins •Bus interface function pins •Bus interface function pins •Interrupt input pins •Bus interface function pins •Timer X, timer Y function pins •D-A converter output pin •PWM output pin •A-D converter output pin •Serial I/O2 function pin •Serial I/O2 function pin •Interrupt input pin •Interrupt input pin •I2C-BUS interface function pin •Bus interface function pin |
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