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M38065MCXXXFP Datasheet(PDF) 10 Page - Renesas Technology Corp |
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M38065MCXXXFP Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 53 page 9 3850 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS Pin Name Input/Output I/O Structure Non-Port Function Ref.No. Table 3 I/O port function Related SFRs I/O PORTS The I/O ports have direction registers which determine the input/ output direction of each individual pin. Each bit in a direction reg- ister corresponds to one pin, and each pin can be set to be input port or output port. When “0” is written to the bit corresponding to a pin, that pin be- comes an input pin. When “1” is written to that bit, that pin becomes an output pin. If data is read from a pin which is set to output, the value of the port output latch is read, not the value of the pin itself. Pins set to input are floating. If a pin set to input is written to, only the port output latch is written to and the pin remains floating. Port P0 Port P1 Port P3 Input/output, individual bits CMOS compatible input level CMOS 3-state output Sub-clock generating circuit CPU mode register (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) P00–P07 P10–P17 P20/XCOUT P21/XCIN P22 P23 P24/RxD P25/TxD Port P2 P26/SCLK P27/CNTR0/SRDY P30/AN0– P34/AN4 P40/CNTR1 P41/INT0– P43/INT2 P44/INT3/PWM Port P4 CMOS compatible input level N-channel open-drain output Serial I/O function I/O Serial I/O function I/O Serial I/O function I/O Timer X function I/O A-D conversion input Serial I/O control register Serial I/O control register Serial I/O control register Timer XY mode register A-D control register Timer Y function I/O External interrupt input External interrupt input PWM output Timer XY mode register Interrupt edge selection register Interrupt edge selection register PWM control register CMOS compatible input level CMOS 3-state output |
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