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M16C21M8FA-AXXXFP Datasheet(PDF) 9 Page - Renesas Technology Corp |
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M16C21M8FA-AXXXFP Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 179 page  Mitsubishi microcomputers M30218 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory 8 Operation of Functional Blocks The M30218 group accommodates certain units in a single chip. These units include ROM and RAM to store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations. Also included are peripheral units such as timers, FLD controller, serial I/O, D-A converter, DMAC, CRC calculation circuit, A-D converter, and I/O ports. The following explains each unit. Memory Figure BA-1 is a memory map of the M30218 group. The address space extends the 1M bytes from ad- dress 0000016 to FFFFF16. From FFFFF16 down is ROM. For example, in the M30218MC-AXXXFP, there is 128K bytes of internal ROM from E000016 to FFFFF16. The vector table for fixed interrupts such as the reset are mapped to FFFDC16 to FFFFF16. The starting address of the interrupt routine is stored here. The address of the vector table for timer interrupts, etc., can be set as desired using the internal register (INTB). See the section on interrupts for details. From 0040016 up is RAM. For example, in the M30218MC-AXXXFP, there is 12K bytes of internal RAM from 0040016 to 033FF16. In addition to storing data, the RAM also stores the stack used when calling subroutines and when interrupts are generated. (From 0040016 to 004FF16 is RAM for SIO2. From 0050016 to 005DF16 is RAM for FLD.) The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for periph- eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Any part of the SFR area that is not occupied is reserved and cannot be used for other purposes. The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions can be used as 2-byte instructions, reducing the number of program steps. Figure BA-1. Memory map 0000016 XXXXX16 FFFFF16 0040016 0050016 005E016 YYYYY16 Internal ROM area SFR area (For details, see Figures BA-2 and BA-3) RAM area for SI/O2 FFE0016 FFFDC16 FFFFF16 Undefined instruction Overflow BRK instruction Address match Single step Watchdog timer Reset Special page vector table DBC Type No. Address XXXXX16 M30218MC M30218FC E000016 Address YYYYY16 033FF16 Internal RAM area RAM area for FLD (224 bytes) M30217MA E800016 017FF16 |
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