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HD74AC373RPEL Datasheet(PDF) 1 Page - Renesas Technology Corp |
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HD74AC373RPEL Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 10 page Rev.2.00, Jul.16.2004, page 1 of 9 HD74AC373/HD74ACT373 Octal Transparent Latch with 3-State Output REJ03D0273–0200Z (Previous ADE-205-394 (Z)) Rev.2.00 Jul.16.2004 Description The HD74AC373/HD74ACT373 consists of eight latches with 3-state outputs from bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is High. When LE is Low, the data that meets the setup time is latched. Data appears on the bus when the Output Enable ( OE) is Low. When OE is High, the bus output is in the high impedance state. Features • Eight Latches in a Single Package • 3-State Outputs for Bus Interfacing • Outputs Source/Sink 24 mA • HD74AC373 has TTL-Compatible Inputs • Ordering Information: Ex. HD74AC373 Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC373P DIP-20 pin DP-20N, -20NEV P — HD74AC373FPEL SOP-20 pin (JEITA) FP-20DAV FP EL (2,000 pcs/reel) HD74AC373RPEL SOP-20 pin (JEDEC) FP-20DBV RP EL (1,000 pcs/reel) HD74AC373TELL TSSOP-20 pin TTP-20DAV T ELL (2,000 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. |
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