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HD74HC163FPEL Datasheet(PDF) 8 Page - Renesas Technology Corp |
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HD74HC163FPEL Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 15 page HD74HC160, HD74HC161, HD74HC162, HD74HC163 Rev.2.00, Oct 11, 2005 page 8 of 14 HD74HC161/HD74HC163 Sequence illustrated in waveforms. 1. Clear outputs to zero. 2. Preset to binary twelve. 3. Count to thirteen, fourteen, fifteen, zero, one and two. 4. Inhibit (Asynchronous) Clear(HC161) Clear(HC163) Clock(HC161) Ripple Carry Output Clear Load Count 15 14 13 12 2 1 0 Inhibit Clock(HC163) Enable P Enable T Load Data Inputs Count Enables Outputs A B C D QA QB QC QD (Synchronous) |
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