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HD74HC589 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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HD74HC589 Datasheet(HTML) 5 Page - Renesas Technology Corp |
5 / 9 page HD74HC589 Rev.2.00 Mar 30, 2006 page 5 of 8 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25 °C Ta = –40 to +85 °C Item Symbol VCC (V) Min Typ Max Min Max Unit Test Conditions 2.0 — — 5 — 4 4.5 — — 27 — 21 Maximum clock frequency fmax 6.0 — — 32 — 25 MHz 2.0 — — 200 — 250 4.5 — 20 40 — 50 tPLH tPHL 6.0 — — 34 — 43 ns Latch clock to QH 2.0 — — 175 — 220 4.5 — 15 35 — 44 tPLH tPHL 6.0 — — 30 — 37 ns Shift clock to QH 2.0 — — 175 — 220 4.5 — 16 35 — 44 Propagation delay time tPLH tPHL 6.0 — — 30 — 37 ns Serial shift/parallel load to QH 2.0 — — 150 — 190 4.5 — 9 30 — 38 Output enable time tZL tZH 6.0 — — 26 — 33 ns 2.0 — — 150 — 190 4.5 — 14 30 — 38 Output disable time tLZ tHZ 6.0 — — 26 — 33 ns 2.0 80 — — 100 — 4.5 16 8 — 20 — Pulse width tw 6.0 14 — — 17 — ns 2.0 100 — — 125 — 4.5 20 1 — 25 — tsu 6.0 17 — — 21 — ns Data to latch clock 2.0 100 — — 125 — 4.5 20 — — 25 — tsu 6.0 17 — — 21 — ns SA to shift clock 2.0 100 — — 125 — 4.5 20 — — 25 — Setup time tsu 6.0 17 — — 21 — ns Serial shift/parallel load to shift clock 2.0 5 — — 5 — 4.5 5 0 — 5 — th 6.0 5 — — 5 — ns Latch clock to data 2.0 5 — — 5 — 4.5 5 — — 5 — th 6.0 5 — — 5 — ns Shift clock to SA 2.0 5 — — 5 — 4.5 5 — — 5 — Hold time th 6.0 5 — — 5 — ns Shift clock to serial shift/ parallel load 2.0 — — 75 — 95 4.5 — 5 15 — 19 Output rise/fall time tTLH tTHL 6.0 — — 13 — 16 ns Input capacitance Cin — — 5 10 — 10 pF |
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