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HD74HC589FPEL Datasheet(PDF) 1 Page - Renesas Technology Corp |
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HD74HC589FPEL Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 9 page Rev.2.00 Mar 30, 2006 page 1 of 8 HD74HC589 8-bit Serial or Parallel-input/Serial-output Shift Register (with 3-state outputs) REJ03D0631-0200 (Previous ADE-205-511) Rev.2.00 Mar 30, 2006 Description The HD74HC589 is similar in function to the HD74HC597, which is not a 3-state device. This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can also be loaded serially (see Function Table). The shift register output, OH, is a three-state output, allowing this device to be used in bus-oriented systems. Features • High Speed Operation: t pd (Shift Clock to QH) = 15 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads • Wide Operating Voltage: V CC = 2 to 6 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: I CC (static) = 4 µA max (Ta = 25°C) • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74HC589FPEL SOP-16 pin (JEITA) PRSP0016DH-B (FP-16DAV) FP EL (2,000 pcs/reel) HD74HC589RPEL SOP-16 pin (JEDEC) PRSP0016DG-A (FP-16DNV) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Function Table Latch Clock LCK Shift Clock SCK Serial Shift/ Parallel Load Output Enable OE Function X X X Data are loaded into input latches X L L Data are loaded from input into shift registers X X L L Data are transferred from input latches to shift registers L, H, L, H, X H Outputs are disabled X H L Serial shift Qn = Qn – 1, Q0 = SER Note: 1. H; High level, L; Low level, X; Irrelevant |
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