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APW7101-18BI-TRL Datasheet(PDF) 9 Page - Anpec Electronics Coropration |
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APW7101-18BI-TRL Datasheet(HTML) 9 Page - Anpec Electronics Coropration |
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9 / 16 page  Copyright © ANPEC Electronics Corp. Rev. A.4 - Jun., 2008 APW7101 www.anpec.com.tw 9 Function Description Main Control Loop The APW7101 uses a constant frequency, current mode step-down architecture. Both the main and synchro- nous switches are internal to reduce the external components. During normal operation, the internal PMOSFET is turned on, but is turned off when the induc- tor current at the input of I COMP to reset the RS latch. The load current increases, it causes a slight decrease in the feedback voltage, which in turn, causes the EA’s out- put voltage to increase until the average inductor current matches the new load current. While the internal power PMOSFET is off, the internal power NMOSFET is turned on until the inductor current starts to reverse, as indicated by the current reversal comparator I RCMP, or the beginning of next cycle. When the NMOSFET is turned off by I RCMP, it operates in the discontinuous conduction mode. Pulse Skipping Mode Operation At light load with a relative small inductance, the in- ductor current may reach zero. The internal power NMOSFET is turned off by the current reversal comparator, I RCMP, and the switching voltage will ring. This is discon- tinuous mode operation, and is normal behavior for the switching regulator. At very light load, the APW7101 will automatically skip some pulses in the pulse skipping mode to maintain the output regulation. The skipping pro- cess modulates smoothly depend on the load. Short Circuit Protection In the short circuit situation, the output voltage is al- most zero volts. Output current is limited by the I COMP to prevent the damage of electrical circuit. In the normal operation, the two straight line of the inductor current ripple have the same height, it means the volts-sec- onds product is the same. When the short circuit opera- tion occurs, the output voltage down to zero leads to the voltage across the inductor maximum in the on period and the voltage across the inductor minimum in the off period. In order to maintain the volts-seconds balance, the off- time must be extended to prevent the inductor current run away. Frequency decay will extend the switching period to provide more times to the off-period, then the inductor An important detail to remember is that on resistance of PMOSFET switch will increase at low input supply voltage. Therefore, the user should calculate the power dissipa- tion when the APW7101 is used at 100% duty cycle with low input voltage. Slope Compensation Slope compensation provides stability in constant fre- quency current mode architecture by preventing sub- harmonic oscillations at high duty cycle. It is accom- plished internally by adding a compensating ramp to the inductor current signal at duty cycle in excess of 40%. Normally, this results in a reduction of maximum induc- tor peak current for duty cycles greater than 40%. In the APW7101, the reduction of inductor peak current recov- ered by a special skill at high duty ratio. This allows the maximum inductor peak current maintain a constant level through all duty ratio. current has to restrict to protect the electrical circuit in the short situation. Dropout Operation As the input supply voltage decreases to a value ap- proaching the output voltage, the duty cycle increases to- ward the maximum on time. Further reduction of the sup- ply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The out- put voltage will then be determined by the input volt- age minus the voltage drop across the PMOSFET and the inductor. |
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