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R5F212CCSDXXXFP Datasheet(PDF) 8 Page - Renesas Technology Corp |
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R5F212CCSDXXXFP Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 615 page A - 1 SFR Page Reference ........................................................................................................................... B - 1 1. Overview ......................................................................................................................................... 1 1.1 Features ..................................................................................................................................................... 1 1.1.1 Applications .......................................................................................................................................... 1 1.1.2 Specifications ........................................................................................................................................ 2 1.2 Product List ............................................................................................................................................... 6 1.3 Block Diagram ......................................................................................................................................... 9 1.4 Pin Assignment ........................................................................................................................................ 10 1.5 Pin Functions ........................................................................................................................................... 13 2. Central Processing Unit (CPU) ..................................................................................................... 15 2.1 Data Registers (R0, R1, R2, and R3) ...................................................................................................... 16 2.2 Address Registers (A0 and A1) ............................................................................................................... 16 2.3 Frame Base Register (FB) ....................................................................................................................... 16 2.4 Interrupt Table Register (INTB) .............................................................................................................. 16 2.5 Program Counter (PC) ............................................................................................................................. 16 2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) .................................................................. 16 2.7 Static Base Register (SB) ........................................................................................................................ 16 2.8 Flag Register (FLG) ................................................................................................................................ 16 2.8.1 Carry Flag (C) ..................................................................................................................................... 16 2.8.2 Debug Flag (D) ................................................................................................................................... 16 2.8.3 Zero Flag (Z) ....................................................................................................................................... 16 2.8.4 Sign Flag (S) ....................................................................................................................................... 16 2.8.5 Register Bank Select Flag (B) ............................................................................................................ 16 2.8.6 Overflow Flag (O) .............................................................................................................................. 16 2.8.7 Interrupt Enable Flag (I) ..................................................................................................................... 17 2.8.8 Stack Pointer Select Flag (U) .............................................................................................................. 17 2.8.9 Processor Interrupt Priority Level (IPL) ............................................................................................. 17 2.8.10 Reserved Bit ........................................................................................................................................ 17 3. Memory ......................................................................................................................................... 18 3.1 R8C/2C Group ......................................................................................................................................... 18 3.2 R8C/2D Group ........................................................................................................................................ 19 4. Special Function Registers (SFRs) ............................................................................................... 20 5. Resets ........................................................................................................................................... 32 5.1 Hardware Reset ....................................................................................................................................... 35 5.1.1 When Power Supply is Stable ............................................................................................................. 35 5.1.2 Power On ............................................................................................................................................ 35 5.2 Power-On Reset Function ....................................................................................................................... 37 5.3 Voltage Monitor 0 Reset ......................................................................................................................... 38 5.4 Voltage Monitor 1 Reset ......................................................................................................................... 38 5.5 Voltage Monitor 2 Reset ......................................................................................................................... 38 5.6 Watchdog Timer Reset ............................................................................................................................ 39 5.7 Software Reset ......................................................................................................................................... 39 Table of Contents |
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