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HD64F38444 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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HD64F38444 Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 719 page  Rev. 6.00 Aug 04, 2006 page vii of xxxvi Main Revisions for this Edition Item Page Revision (See Manual for Details) All “Under development” indication deleted from H8/38447 Group Preface iv Added Notes: 6. During a break, the watchdog timer continues to operate. Therefore, an internal reset is generated if an overflow occurs during the break. 1.3.2 Pin Functions Table 1.6 Pin Functions 33 Table amended Pin No. Type Symbol FP-100B TFP-100B TFP-100G FP-100A I/O Name and Functions System control TEST 14 17 Intput Test pin: This pin is reserved and cannot be used. It should be connected to VSS. 8.3.1 Overview 213 Description amended Port 2 is an 8-bit I/O port. Figure 8.2 shows its pin configuration. In the F-ZTAT version, the on-chip pull-up MOS for pin P24 is on during the reset period. It turns off and normal operation resumes after the reset is cleared. The pull-up MOS is controlled by hardware; it cannot be manipulated by a user program. This should be considered when making connections to external circuitry. Note that the mask ROM and ZTAT versions do not have this function. 8.3.4 Pin States Table 8.7 Port 2 Pin States 218 Table and notes amended Pins Reset Sleep Subsleep Standby Watch Subactive Active P27 to P25 High- impedance P24* 1 Pull-up MOS on Retains previous state Retains previous state High- impedance Retains previous state Functional Functional P24* 2 P23 High- impedance P22/SO1 P21/SI1 P20/SCK1 High- impedance Notes: 1. Applies to the F-ZTAT version of the H8/38347 Group and H8/38447 Group. 2. Applies to H8/3847R Group and H8/3847S Group. Also applies to the mask ROM version of the H8/38347 Group and H8/38447 Group. |
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