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H8SX1642L Datasheet(PDF) 11 Page - Renesas Technology Corp

Part # H8SX1642L
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX1642L Datasheet(HTML) 11 Page - Renesas Technology Corp

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Rev. 2.00 Jul. 31, 2008 Page xi of xxx
Section 4 Reset.....................................................................................................93
4.1
Types of Reset .................................................................................................................... 93
4.2
Input/Output Pin ................................................................................................................. 95
4.3
Register Descriptions .......................................................................................................... 96
4.3.1
Reset Status Register (RSTSR)........................................................................... 96
4.3.2
Reset Control/Status Register (RSTCSR)........................................................... 98
4.4
Pin Reset ............................................................................................................................. 99
4.5
Power-on Reset (POR) (H8SX/1648L Group and H8SX/1648H Group)........................... 99
4.6
Power Supply Monitoring Reset (H8SX1648L Group, H8SX1648H Group) .................. 100
4.7
Deep Software Standby Reset........................................................................................... 101
4.8
Watchdog Timer Reset ..................................................................................................... 101
4.9
Determination of Reset Generation Source....................................................................... 101
Section 5 Voltage Detection Circuit (LVD) ......................................................103
5.1
Features............................................................................................................................. 103
5.2
Register Descriptions ........................................................................................................ 104
5.2.1
Voltage Detection Control Register (LVDCR)................................................. 104
5.2.2
Reset Status Register (RSTSR)......................................................................... 105
5.3
Voltage Detection Circuit ................................................................................................. 107
5.3.1
Voltage Monitoring Reset................................................................................. 107
5.3.2
Voltage Monitoring Interrupt............................................................................ 108
5.3.3
Release from Deep Software Standby Mode by the Voltage-Detection
Circuit ............................................................................................................... 110
5.3.4
Voltage Monitor................................................................................................ 110
Section 6 Exception Handling ...........................................................................111
6.1
Exception Handling Types and Priority............................................................................ 111
6.2
Exception Sources and Exception Handling Vector Table ............................................... 112
6.3
Reset ................................................................................................................................. 114
6.3.1
Reset Exception Handling................................................................................. 114
6.3.2
Interrupts after Reset......................................................................................... 115
6.3.3
On-Chip Peripheral Functions after Reset Release ........................................... 115
6.4
Traces................................................................................................................................ 117
6.5
Address Error.................................................................................................................... 118
6.5.1
Address Error Source........................................................................................ 118
6.5.2
Address Error Exception Handling ................................................................... 119
6.6
Interrupts........................................................................................................................... 121
6.6.1
Interrupt Sources............................................................................................... 121
6.6.2
Interrupt Exception Handling ........................................................................... 122


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