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R4F2472 Datasheet(PDF) 9 Page - Renesas Technology Corp |
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R4F2472 Datasheet(HTML) 9 Page - Renesas Technology Corp |
9 / 1250 page Rev. 2.00 Aug. 20, 2008 Page ix of xlviii Contents Section 1 Overview................................................................................................1 1.1 Overview................................................................................................................................ 1 1.2 Block Diagram ....................................................................................................................... 3 1.3 Pin Description....................................................................................................................... 4 1.3.1 Pin Assignments ....................................................................................................... 4 1.3.2 Pin Assignment in Each Operating Mode................................................................. 7 1.3.3 Pin Functions .......................................................................................................... 14 Section 2 CPU......................................................................................................25 2.1 Features ................................................................................................................................ 25 2.1.1 Differences between H8S/2600 CPU and H8S/2000 CPU ..................................... 26 2.1.2 Differences from H8/300 CPU ............................................................................... 27 2.1.3 Differences from H8/300H CPU............................................................................. 27 2.2 CPU Operating Modes ......................................................................................................... 28 2.2.1 Normal Mode.......................................................................................................... 28 2.2.2 Advanced Mode...................................................................................................... 30 2.3 Address Space...................................................................................................................... 32 2.4 Registers............................................................................................................................... 33 2.4.1 General Registers .................................................................................................... 34 2.4.2 Program Counter (PC) ............................................................................................ 35 2.4.3 Extended Control Register (EXR) .......................................................................... 35 2.4.4 Condition-Code Register (CCR) ............................................................................. 36 2.4.5 Multiply-Accumulate Register (MAC) ................................................................... 37 2.4.6 Initial Values of CPU Registers .............................................................................. 37 2.5 Data Formats........................................................................................................................ 38 2.5.1 General Register Data Formats ............................................................................... 38 2.5.2 Memory Data Formats ............................................................................................ 40 2.6 Instruction Set ...................................................................................................................... 41 2.6.1 Table of Instructions Classified by Function .......................................................... 42 2.6.2 Basic Instruction Formats ....................................................................................... 52 2.7 Addressing Modes and Effective Address Calculation ........................................................ 53 2.7.1 Register Direct Rn................................................................................................ 53 2.7.2 Register Indirect @ERn ....................................................................................... 53 2.7.3 Register Indirect with Displacement @(d:16, ERn) or @(d:32, ERn)................. 54 2.7.4 Register Indirect with Post-Increment or Pre-Decrement @ERn+ or @-ERn..... 54 2.7.5 Absolute Address @aa:8, @aa:16, @aa:24, or @aa:32....................................... 54 |
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