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H838700S Datasheet(PDF) 11 Page - Renesas Technology Corp |
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H838700S Datasheet(HTML) 11 Page - Renesas Technology Corp |
11 / 402 page Rev. 1.00 Dec. 13, 2007 Page xi of xviii 3.2.1 Interrupt Edge Select Register (IEGR) ............................................................... 59 3.2.2 Interrupt Enable Register 1 (IENR1) .................................................................. 60 3.2.3 Interrupt Enable Register 2 (IENR2) .................................................................. 61 3.2.4 Interrupt Request Register 1 (IRR1) ................................................................... 62 3.2.5 Interrupt Request Register 2 (IRR2) ................................................................... 63 3.2.6 Wakeup Interrupt Request Register (IWPR)....................................................... 64 3.2.7 Wakeup Edge Select Register (WEGR).............................................................. 65 3.3 Reset Exception Handling................................................................................................... 65 3.4 Interrupt Exception Handling ............................................................................................. 66 3.4.1 External Interrupts .............................................................................................. 66 3.4.2 Internal Interrupts ............................................................................................... 67 3.4.3 Interrupt Handling Sequence .............................................................................. 68 3.4.4 Interrupt Response Time..................................................................................... 69 3.5 Usage Notes ........................................................................................................................ 71 3.5.1 Interrupts after Reset........................................................................................... 71 3.5.2 Notes on Stack Area Use .................................................................................... 71 3.5.3 Interrupt Request Flag Clearing Method............................................................. 71 3.5.4 Notes on Rewriting Port Mode Registers............................................................ 72 Section 4 Clock Pulse Generators........................................................................75 4.1 Features............................................................................................................................... 75 4.2 System Clock Generator ..................................................................................................... 76 4.2.1 Connecting Crystal Resonator ............................................................................ 76 4.2.2 Connecting Ceramic Resonator .......................................................................... 77 4.2.3 External Clock Input Method.............................................................................. 77 4.3 Subclock Generator............................................................................................................. 78 4.3.1 Connecting 32.768-kHz/38.4-kHz Crystal Resonator......................................... 78 4.3.2 Pin Connection when Not Using Subclock ......................................................... 79 4.3.3 External Clock Input ........................................................................................... 80 4.4 Prescalers ............................................................................................................................ 80 4.4.1 Prescaler S .......................................................................................................... 80 4.4.2 Prescaler W ......................................................................................................... 80 4.5 Usage Notes ........................................................................................................................ 81 4.5.1 Note on Resonators ............................................................................................. 81 4.5.2 Notes on Board Design ....................................................................................... 82 4.5.3 Definition of Oscillation Stabilization Standby Time......................................... 83 4.5.4 Notes on Use of Resonator ................................................................................. 85 |
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