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HD6433636S Datasheet(PDF) 8 Page - Renesas Technology Corp |
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HD6433636S Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 418 page  ii 2.8 Memory Map ..................................................................................................................... 47 2.9 Application Notes .............................................................................................................. 48 2.9.1 Notes on Data Access ........................................................................................... 48 2.9.2 Notes on Bit Manipulation ................................................................................... 50 2.9.3 Notes on Use of the EEPMOV Instruction .......................................................... 56 Section 3 Exception Handling........................................................................................ 57 3.1 Overview............................................................................................................................ 57 3.2 Reset .................................................................................................................................. 57 3.2.1 Overview .............................................................................................................. 57 3.2.2 Reset Sequence ..................................................................................................... 57 3.2.3 Interrupt Immediately after Reset ........................................................................ 58 3.3 Interrupts............................................................................................................................ 59 3.3.1 Overview .............................................................................................................. 59 3.3.2 Interrupt Control Registers ................................................................................... 61 3.3.3 External Interrupts................................................................................................ 69 3.3.4 Internal Interrupts ................................................................................................. 70 3.3.5 Interrupt Operations.............................................................................................. 70 3.3.6 Interrupt Response Time ...................................................................................... 75 3.4 Application Notes .............................................................................................................. 76 3.4.1 Notes on Stack Area Use...................................................................................... 76 3.4.2 Notes on Rewriting Port Mode Registers ............................................................. 76 Section 4 Clock Pulse Generators................................................................................. 79 4.1 Overview............................................................................................................................ 79 4.1.1 Block Diagram...................................................................................................... 79 4.1.2 System Clock and Subclock ................................................................................. 79 4.2 System Clock Generator.................................................................................................... 80 4.3 Subclock Generator ........................................................................................................... 83 4.4 Prescalers ........................................................................................................................... 84 4.5 Note on Oscillators ............................................................................................................ 84 Section 5 Power-Down Modes ........................................................................................ 87 5.1 Overview............................................................................................................................ 87 5.1.1 System Control Registers ..................................................................................... 90 5.2 Sleep Mode ........................................................................................................................ 93 5.2.1 Transition to Sleep Mode ..................................................................................... 93 5.2.2 Clearing Sleep Mode ............................................................................................ 93 5.3 Standby Mode.................................................................................................................... 94 5.3.1 Transition to Standby Mode ................................................................................. 94 5.3.2 Clearing Standby Mode........................................................................................ 94 5.3.3 Oscillator Settling Time after Standby Mode is Cleared...................................... 95 5.3.4 Transition to Standby Mode and Pin States ......................................................... 96 |
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