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3819 Datasheet(PDF) 8 Page - Renesas Technology Corp

Part # 3819
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
Download  218 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

3819 Datasheet(HTML) 8 Page - Renesas Technology Corp

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3819 Group USER’S MANUAL
iii
Table of contents
2.5 FLD controller ....................................................................................................................... 109
2.5.1 Related registers ............................................................................................................ 109
2.5.2 FLD controller application examples .............................................................................. 115
2.6 Interrupt interval determination function ......................................................................... 139
2.6.1 Related registers ............................................................................................................ 139
2.6.2 Interrupt interval determination function ......................................................................... 142
2.7 Zero cross detection circuit ............................................................................................... 147
2.7.1 Related registers ............................................................................................................ 147
2.7.2 Connection example of Zero cross detection circuit ....................................................... 149
2.7.3 Zero cross detection circuit application example 1 ......................................................... 150
2.7.4 Zero cross detection circuit application example 2 ......................................................... 152
2.8 Reset ....................................................................................................................................... 154
2.8.1 Connection example of reset IC ..................................................................................... 154
2.9 Clock generating circuit ...................................................................................................... 155
2.9.1 Related registers ........................................................................................................... 155
2.9.2 Clock generating circuit application examples .............................................................. 160
CHAPTER 3. APPENDIX
3.1 Notes on use ........................................................................................................................ 170
3.1.1 Notes on interrupts ......................................................................................................... 170
3.1.2 Notes on the FLD controller and the serial I/O automatic transfer function .................... 170
3.1.3 Notes on the A-D converter ............................................................................................ 170
3.1.4 Notes on the RESET pin ................................................................................................ 171
3.1.5 Notes on input and output pins ....................................................................................... 171
3.1.6 Notes on clock synchronous serial I/O ........................................................................... 172
3.1.7 Notes on built-in PROM .................................................................................................. 173
3.2 Countermeasures against noise ........................................................................................ 174
3.2.1 Shortest wiring length ..................................................................................................... 174
3.2.2 Connection of a bypass capacitor across the VSS line and the VCC line ........................ 175
3.2.3 Wiring to analog input pins ............................................................................................. 176
3.2.4 Oscillator concerns ......................................................................................................... 176
3.2.5 Setup for I/O ports .......................................................................................................... 177
3.2.6 Providing of watchdog timer function by software .......................................................... 177
3.3 Control registers ................................................................................................................... 179
3.4 Mask ROM ordering method .............................................................................................. 196
3.5 Mark specification form ...................................................................................................... 198
3.6 Package outline .................................................................................................................... 199
3.7 Memory map .......................................................................................................................... 200
3.8 Pin configuration .................................................................................................................. 201


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