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HD6433884F Datasheet(PDF) 10 Page - Renesas Technology Corp |
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HD6433884F Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 523 page  i Contents Section 1 Overview ........................................................................................................... 1 1.1 Overview............................................................................................................................ 1 1.2 Internal Block Diagram ..................................................................................................... 7 1.3 Pin Arrangement and Functions ........................................................................................ 8 1.3.1 Pin Arrangement .................................................................................................. 8 1.3.2 Pin Functions........................................................................................................ 10 Section 2 CPU..................................................................................................................... 15 2.1 Overview............................................................................................................................ 15 2.1.1 Features ................................................................................................................ 15 2.1.2 Address Space ...................................................................................................... 16 2.1.3 Register Configuration ......................................................................................... 16 2.2 Register Descriptions......................................................................................................... 17 2.2.1 General Registers.................................................................................................. 17 2.2.2 Control Registers.................................................................................................. 17 2.2.3 Initial Register Values .......................................................................................... 18 2.3 Data Formats...................................................................................................................... 19 2.3.1 Data Formats in General Registers....................................................................... 20 2.3.2 Memory Data Formats.......................................................................................... 21 2.4 Addressing Modes .............................................................................................................22 2.4.1 Addressing Modes................................................................................................ 22 2.4.2 Effective Address Calculation.............................................................................. 24 2.5 Instruction Set.................................................................................................................... 28 2.5.1 Data Transfer Instructions .................................................................................... 30 2.5.2 Arithmetic Operations .......................................................................................... 32 2.5.3 Logic Operations .................................................................................................. 33 2.5.4 Shift Operations.................................................................................................... 33 2.5.5 Bit Manipulations ................................................................................................. 35 2.5.6 Branching Instructions.......................................................................................... 39 2.5.7 System Control Instructions ................................................................................. 41 2.5.8 Block Data Transfer Instruction ........................................................................... 42 2.6 Basic Operational Timing.................................................................................................. 44 2.6.1 Access to On-Chip Memory (RAM, ROM) ......................................................... 44 2.6.2 Access to On-Chip Peripheral Modules ............................................................... 45 2.7 CPU States ......................................................................................................................... 47 2.7.1 Overview .............................................................................................................. 47 2.7.2 Program Execution State ..................................................................................... 48 2.7.3 Program Halt State ............................................................................................... 48 2.7.4 Exception-Handling State .................................................................................... 48 |
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