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SN65HVD1785P Datasheet(PDF) 5 Page - Texas Instruments

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Part # SN65HVD1785P
Description  70-V Fault-Protected RS-485 Transceivers
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN65HVD1785P Datasheet(HTML) 5 Page - Texas Instruments

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SWITCHING CHARACTERISTICS
SN65HVD1785, SN65HVD1786
SN65HVD1787, SN65HVD1791
SN65HVD1792, SN65HVD1793
www.ti.com ....................................................................................................................................................... SLLS872E – JANUARY 2008 – REVISED JULY 2008
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DRIVER (HVD1785 AND HVD1791)
tr, tf
Driver differential output rise/fall time
0.4
1.7
2.6
µs
tPHL, tPLH
Driver propagation delay
0.8
2
µs
RL = 54 Ω, CL = 50 pF, See Figure 3
Driver differential output pulse skew,
tSK(P)
20
250
ns
|tPHL – tPLH|
tPHZ, tPLZ
Driver disable time
0.1
5
µs
See Figure 4 and
Receiver enabled
0.2
3
Figure 5
tPZH, tPZL
Driver enable time
µs
Receiver disabled
3
12
DRIVER (HVD1786 AND HVD1792)
tr, tf
Driver differential output rise/fall time
50
300
ns
tPHL, tPLH
Driver propagation delay
200
ns
RL = 54 Ω, CL = 50 pF, See Figure 3
Driver differential output pulse skew,
tSK(P)
25
ns
|tPHL – tPLH|
tPHZ, tPLZ
Driver disable time
3
µs
See Figure 4 and
Receiver enabled
300
ns
Figure 5
tPZH, tPZL
Driver enable time
Receiver disabled
10
µs
DRIVER (HVD1787 AND HVD1793)
tr, tf
Driver differential output rise/fall time
3
30
ns
tPHL, tPLH
Driver propagation delay
50
ns
RL = 54 Ω, CL = 50 pF, See Figure 3
Driver differential output pulse skew,
tSK(P)
10
ns
|tPHL – tPLH|
tPHZ, tPLZ
Driver disable time
3
µs
See Figure 4 and
Receiver enabled
300
ns
Figure 5
tPZH, tPZL
Driver enable time
Receiver disabled
9
µs
RECEIVER (ALL DEVICES UNLESS OTHERWISE NOTED)
tr, tf
Receiver output rise/fall time
4
15
ns
85, 86, 91, 92
100
200
tPHL, tPLH
Receiver propagation delay time
ns
CL = 15 pF,
87, 93
70
See Figure 6
85, 86, 91, 92
6
20
Receiver output pulse skew,
tSK(P)
ns
|tPHL – tPLH|
87, 93
5
tPLZ, tPHZ
Receiver disable time
Driver enabled, See Figure 7
15
100
ns
tPZL(1), tPZH(1)
Driver enabled, See Figure 7
80
300
ns
Receiver enable time
tPZL(2), tPZH(2)
Driver disabled, See Figure 8
3
9
µs
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s): SN65HVD1785, SN65HVD1786 SN65HVD1787, SN65HVD1791 SN65HVD1792, SN65HVD1793


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