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TPS51200DRCR Datasheet(PDF) 11 Page - Texas Instruments |
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TPS51200DRCR Datasheet(HTML) 11 Page - Texas Instruments |
11 / 35 page www.ti.com Output Tolerance Consideration for VTT DIMM Applications DDR3 240 Pin Socket TPS51200 10 mF 10 mF 10 mF VO UDG-08022 R S 20 W V OUT V IN 25 W V TT V DDQ Ouput Buffer (Driver) Receiver V SS UDG-08023 Q1 Q2 TPS51200 SLUS812 – FEBRUARY 2008 The TPS51200 is specifically designed to power up the memory termination rail (as shown in Figure 3). The DDR memory termination structure determines the main characteristics of the VTT rail, which is to be able to sink and source current while maintaining acceptable VTT tolerance. See Figure 4 for typical characteristics for a single memory cell. Figure 3. Typical Application Diagram for DDR3 VTT DIMM using TPS51200 Figure 4. DDR Physical Signal System Bi-Directional SSTL Signaling In Figure 4, when Q1 is on and Q2 is off: • Current flows from VDDQ via the termination resistor to VTT • VTT sinks current In Figure 4, when Q2 is on and Q1 is off: • Current flows from VTT via the termination resistor to GND • VTT sources current Copyright © 2008, Texas Instruments Incorporated 11 Product Folder Link(s): TPS51200 |
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