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TPS3808G19DBVR Datasheet(PDF) 9 Page - Texas Instruments |
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TPS3808G19DBVR Datasheet(HTML) 9 Page - Texas Instruments |
9 / 20 page C T (nF) + tD (s)*0.5 10*3 (s) 175 (1) 1.2V 3.3V TPS3808G12 TPS3808G33 DSP SENSE V DD V DD SENSE V I/O V CORE GPIO GND GND GND RESET MR C T C T RESET IMMUNITY TO SENSE PIN VOLTAGE 3.3V TPS3808xxx V DD SENSE MR 90kW GND SELECTING THE RESET DELAY TIME Delay (s) = CT (nF) + 0.5 x 10−3 (s) 20ms Delay 300ms Delay (c) (b) (a) 175 3.3V TPS3808G33 V DD SENSE C T RESET 3.3V TPS3808G33 V DD SENSE C T C T RESET 3.3V TPS3808G33 V DD SENSE C T 50k Ω RESET TPS3808 www.ti.com .......................................................................................................................................................... SBVS050J – MAY 2004 – REVISED AUGUST 2008 by the choice of resistor. Figure 14b shows a fixed 20ms delay time by leaving the CT pin open. Figure 14c shows a ground referenced capacitor connected to CT for a user-defined program time between 1.25ms and 10s. The capacitor CT should be ≥ 100pF nominal value in order for the TPS3808xxx to recognize that the capacitor is present. The capacitor value for a given delay time can be calculated using the following equation: The reset delay time is determined by the time it Figure 12. Using MR to Monitor Multiple System takes an on-chip precision 220nA current source to Voltages charge the external capacitor to 1.23V. When a RESET is asserted the capacitor is discharged. When the RESET conditions are cleared, the internal current source is enabled and begins to charge the external capacitor. When the voltage on this capacitor reaches 1.23V, RESET is de-asserted. Note that a low leakage type capacitor such as a ceramic should be used, and that stray capacitance around this pin may cause errors in the reset delay time. TRANSIENTS The TPS3808 is relatively immune to short negative Figure 13. Using an External MOSFET to Minimize transients on the SENSE pin. Sensitivity to transients IDD When MR Signal Does Not Go to VDD is dependent on threshold overdrive, as shown in the Maximum Transient Duration at Sense vs Sense Threshold Overdrive Voltage graph (Figure 6) in the Typical Characteristics section. The TPS3808 has three options for setting the RESET delay time as shown in Figure 14. Figure 14a shows the configuration for a fixed 300ms typical delay time by tying CT to VDD; a resistor from 40kΩ to 200k Ω must be used. Supply current is not affected Figure 14. Configuration Used to Set the RESET Delay Time Copyright © 2004–2008, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TPS3808 |
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