LC01700PW

No.A1337-11/18

8-3. Consecutive register • data writing

Continuous data transmission after transmission of initially-set address data of register • data writing sequence enables

writing of data in the consecutive register • data area. In this case, the register • address increases by one address from

the initially-set address of the sequence and continues increasing till the "Stop" condition (P) is generated.

8-4. Consecutive register • data reading

When the master returns ACK (0 data) after reading of the initial register • address • data of read sequence, the register

• address increases by one address, enabling consecutive reading of data corresponding to each register address. If the

master does not return ACK (0 data), the register address does not increase.

S

111001000

0000

1/0 1/0 1/0 1/0

0

START condition

SDA

Slave address

Register address

ACK

1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0

0

1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0

0

Register data (of Register address)

ACK Register data (of Register address+1) ACK

Write

Invalid address

ACK

1/0 1/0 1/0 1/0 1/0 1/0 1/0

From master to slave

From slave to master

1/0

0

0

P

Register data (of Register address+2) ACK Register data (of Register address+n) ACK STOP condition

S

111001000

0000

1/0 1/0 1/0 1/0

0

START condition

SDA

Slave address

Register address

ACK

Sr

111001010

1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0

0

Slave address

ACK

Repeated START condition

Register data (of Register address)

ACK

Write

Read

Invalid address

ACK

0

1/0 1/0 1/0 1/0 1/0 1/0

From master to slave

From slave to master

1/0 1/0

0

1

P

Register data (of Register address+1) ACK

ACK

Register data (of Register address+n) NACK STOP condition