Document Number: 63024

For any questions, contact: foil@vishay.com

www.vishay.com

Revision: 25-Oct-07

3

V5X5P, V15X5P, V15X10P

with TCR of 2 ppm/°C and Tolerance to 0.005 %

for use in Hybrid Circuits

Vishay Foil Resistors

Notes

1. TCR Tracking is a measure of the similarity of resistance value

change in two or more resistors which are undergoing the same

temperature changes. Tracking could be expressed as the

difference in the temperature coefficients of the resistors,

expressed in ppm/°C as (

ΔR

ΔT °C.

2. Selected TCR Tracking is available for specially ordered lots of

resistors. The selected TCR tracking can be 3, 2, 1 and as close

as 0.5 ppm/°C throughout the full temperature range. Should

close TCR tracking be required for differing resistance values,

contact the factory.

3. All

measurements

are

based

on

pad-to-pad

excluding

termination wires. Maximum is 1.0 % A.Q.L. standard for all

specifications except TCR (for TCR information, see table 1 and

notes 1 and 2).

4. The resolution limit of existing test equipment.

5. Similar to MIL-Style RM0505 (MIL-PRF-55342/2).

6. Similar to MIL-Style RM1505 (MIL-PRF-55342/4).

7. When bonded to a ceramic substrate.

TABLE 3 - ENVIRONMENTAL PERFORMANCE COMPARISON

METHOD PARAGRAPH

MIL-PRF-55342 CHARACTERISTIC E LIMITS

TYPICAL VISHAY

Test group I

Thermal shock

4.8.3

± 0.1 %

± 0.02 %

Test group II

Low temperature operation

Short time overload

High temperature exposure

Resistance to bonding exposure

4.8.5

4.8.6

4.8.7

4.8.8

± 0.1 %

± 0.1 %

± 0.1 %

± 0.2 %

± 0.005 %

± 0.02 %

± 0.02 %

± 0.02 %

Test group III

Moisture resistance

4.8.9

± 0.2 %

± 0.1 %

Test group IV

Life 2000 h at + 70 °C

4.8.11

± 0.5 %

± 0.04 %

FIGURE 3 - POWER DERATING CURVE

Discrete chips suitable for working temperatures of up to + 175 °C are

available on request.

+ 125

+ 100

+ 75

+ 50

+ 25

0

- 75

- 50

- 25

0

+ 25

+ 50

+ 75 + 100

+ 125 + 150

Ambient Temperature (°C)

- 55 °C

+ 70 °C

Rated Power

FIGURE 4 - TRIMMING TO VALUES

(Conceptual Illustration)

Mutual Inductance

Reduction due

to Change in

Current Direction

Current Path

Before Trimming

Note: Foil shown in black, etched spaces in white

Interloop Capacitance

Reduction in Series

Trimming Process

Removes this Material

from Shorting Strip Area

Changing Current Path

and Increasing

Resistance

Current Path

After Trimming