___________________________________________________ DS33M30/M31/M33 ABRIDGED DATA SHEET

Rev: 101508

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1.3.7.2 STS-1/AU-3/TU-3 Pointer Interpreter

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Per STS-1/AU-3/TU-3 tributary pointer interpretation using the outbound Drop STS-3/STM-1 clock

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Pointer interpretation per Telcordia GR-253-CORE and ITU G.707 specifications

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Extraction of STS-1, AU-3, or TU-3 pointer bytes (H1, H2, and H3)

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Detection of defects including, LOP and “all-ones” pointer (AIS-P)

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Detection and accumulation of incoming pointer increments, decrements, changes, and new pointers

1.3.8 STS-1/VC-3 Path Termination (DS33M31 and DS33M33 only)

1.3.8.1 STS-1/VC-3 Path Overhead Generation

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Generation of all POH bytes including Path trace ID (J1), Path BIP-8 (B3), Path signal label (C2), Path

status (G1), Path user byte (F2), Path concatenation indicator (H4), and Path growth (Z3, Z4, and Z5)

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All POH bytes can be inserted from either the associated inbound Add STS-1/VC-3 POH input port or

software accessible internal registers

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Automatic or manual generation of PTE alarm defects including RDI-P and ERDI-P

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Programmable error insertion of B3 and REI errors

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Insertion of HDLC data stream into path user byte (F2)

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Insertion of path trace ID into path trace byte (J1)

1.3.8.2 STS-1/VC-3 Path Overhead Reception and Monitoring

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Termination of all POH bytes (per PTE requirement) including Path trace ID (J1), Path BIP-8 (B3), path

signal label (C2), Path status (G1), Path user byte (F2), path concatenation indicator (H4), and Path growth

(Z3, Z4, and Z5)

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All POH bytes presented on the associated STS-1 SPE/VC-3 POH output port and software accessible

internal registers

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Detection of PTE defects: PLM-P, PLU-P, UNEQ-P, PDI-P, RDI-P, and Enhanced RDI-P (ERDI-P)

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Detection and accumulation of path B3 and path REI errors (part of G1) on a bit or block basis

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Two POH B3 bit error rate (BER) measurement circuits with separate software programmable detection

and clearing thresholds

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Extraction of HDLC data stream from path user byte (F2)

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Extraction of path trace ID from path trace byte (J1)

1.3.8.3 STS-1/VC-3 Synchronizer

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Synchronization of STS-1 SPE/VC-3 to accommodate asynchronous payload through pointer justifications

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Accommodation of frequency offsets up to +100ppm between the SONET/SDH Telecom Bus reference

frequency of 77.76MHz and the line/tributary STS-1 frequency 51.84MHz

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Elastic store overflow and underflow conditions

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Selectable lock and fast lock modes of operation

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Programmable frequency out of range indication (

±5, ±10, ±20, or ±40ppm).

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SONET mapping jitter conforming to GR-253 and GR-499 and SDH mapping jitter compliant to ITU G.825e

and O.172e

1.3.8.4 STS-1 SPE Payload Mapping

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Each STS-1 SPE can be mapped with Asynchronous DS3/E3 or Ethernet traffic. These two mapping

modes are mutually exclusive.

1.3.8.5 STS-1 SPE Ethernet Mapping/Demapping

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Mapping of Ethernet packets into STS-1 SPE

1.3.8.6 Async DS3/E3 Demapper/Desynchronizer

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Extraction of DS3/E3 data stream from an STS-1 SPE compliant to Telcordia GR-253 or VC-3 compliant to

ITU G.707

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Generation of a nominal rate E3 (34.368MHz) or DS3 (44.736MHz)

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Standard SONET STS-1 demapping for a DS3/E3 conforming with Telcordia GR-253 and GR-499

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Standard SDH VC-3 demapping for a DS3/E3 conforming to ITU-T G.707, G.825e, and O.172e

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All combinations of DS3 or E3 demapping configuration from STS-1, AU-3, or TU-3/AU-4 are possible

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Software configuration for SONET/SDH demapping on a per tributary basis