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DS3102GN+ Datasheet(PDF) 3 Page - Maxim Integrated Products

Part # DS3102GN+
Description  Stratum 3 Timing Card IC with Synchronous Ethernet Support
Download  141 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS3102GN+ Datasheet(HTML) 3 Page - Maxim Integrated Products

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____________________________________________________________________________________________ DS3102
Rev: 102808
3 of 141
7.9.1
Master-Slave Output Clock-Phase Alignment ..................................................................................... 45
7.9.2
Master-Slave Frame and Multiframe Alignment with the External Frame-Sync Signals ..................... 46
7.9.3
SYNCn Pins ......................................................................................................................................... 48
7.9.4
Other Configuration Options ................................................................................................................ 49
7.10
MICROPROCESSOR INTERFACE ..................................................................................................49
7.11
RESET LOGIC.............................................................................................................................52
7.12
POWER-SUPPLY CONSIDERATIONS.............................................................................................52
7.13
INITIALIZATION............................................................................................................................52
8.
REGISTER DESCRIPTIONS .........................................................................................................53
8.1
STATUS BITS.................................................................................................................................53
8.2
CONFIGURATION FIELDS................................................................................................................53
8.3
MULTIREGISTER FIELDS.................................................................................................................53
8.4
REGISTER DEFINITIONS .................................................................................................................54
9.
JTAG TEST ACCESS PORT AND BOUNDARY SCAN .............................................................123
9.1
JTAG DESCRIPTION....................................................................................................................123
9.2
JTAG TAP CONTROLLER STATE MACHINE DESCRIPTION.............................................................124
9.3
JTAG INSTRUCTION REGISTER AND INSTRUCTIONS......................................................................126
9.4
JTAG TEST REGISTERS ..............................................................................................................127
10.
ELECTRICAL CHARACTERISTICS............................................................................................128
10.1
DC CHARACTERISTICS.............................................................................................................128
10.2
INPUT CLOCK TIMING ...............................................................................................................132
10.3
OUTPUT CLOCK TIMING............................................................................................................132
10.4
SPI INTERFACE TIMING ............................................................................................................133
10.5
JTAG INTERFACE TIMING.........................................................................................................135
10.6
RESET PIN TIMING ...................................................................................................................136
11.
PIN ASSIGNMENTS ....................................................................................................................137
12.
PACKAGE INFORMATION .........................................................................................................139
13.
ACRONYMS AND ABBREVIATIONS .........................................................................................140
14.
DATA SHEET REVISION HISTORY............................................................................................141


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