CY7B991V
3.3V RoboClock®
Document Number: 38-07141 Rev. *D
Page 9 of 13
Capacitance
Tested initially and after any design or process changes that may affect these parameters. [10]]
Parameter
Description
Test Conditions
Max
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz, VCC = 3.3V
10
pF
AC Test Loads and Waveforms
Figure 10. Test Loads and Waveforms
TTL AC Test Load
TTL Input Test Waveform
VCC
R1
R2
CL
3.0V
2.0V
Vth =1.5V
0.8V
0.0V
≤ 1 ns
≤ 1 ns
2.0V
0.8V
Vth =1.5V
R1=100
R2=100
CL =30 pF
(Includes fixture and probe capacitance)
Note
10. Applies to REF and FB inputs only. Tested initially and after any design or process changes that may affect these parameters.
Switching Characteristics
Over the Operating Range [2, 11]
Parameter
Description
CY7B991V–2
Unit
Min
Typ
Max
fNOM
Operating Clock
Frequency in MHz
FS = LOW[1, 2]
15
30
MHz
FS = MID[1, 2]
25
50
FS = HIGH[1, 2 , 3]
40
80
tRPWH
REF Pulse Width HIGH
5.0
ns
tRPWL
REF Pulse Width LOW
5.0
ns
tU
Programmable Skew Unit
See Table 2
tSKEWPR
Zero Output Matched-Pair Skew (XQ0, XQ1)[13, 14]
0.05
0.2
ns
tSKEW0
Zero Output Skew (All Outputs)[13, 15]
0.1
0.25
ns
tSKEW1
Output Skew (Rise-Rise, Fall-Fall, Same Class Outputs)[13, 17]
0.1
0.5
ns
tSKEW2
Output Skew (Rise-Fall, Nominal-Inverted, Divided-Divided)[13, 17]
0.5
1.0
ns
tSKEW3
Output Skew (Rise-Rise, Fall-Fall, Different Class Outputs)[13, 17]
0.25
0.5
ns
tSKEW4
Output Skew (Rise-Fall, Nominal-Divided, Divided-Inverted)[13, 17]
0.5
0.9
ns
tDEV
Device-to-Device Skew[12, 18]
1.25
ns
tPD
Propagation Delay, REF Rise to FB Rise
–0.25
0.0
+0.25
ns
tODCV
Output Duty Cycle Variation[19]
–0.65
0.0
+0.65
ns
tPWH
Output HIGH Time Deviation from 50%[20]
2.0
ns
tPWL
Output LOW Time Deviation from 50%[20]
1.5
ns
tORISE
Output Rise Time[20, 21]
0.15
1.0
1.2
ns
tOFALL
Output Fall Time[20, 21]
0.15
1.0
1.2
ns
tLOCK
PLL Lock Time[22]
0.5
ms
tJR
Cycle-to-Cycle Output
Jitter
RMS[12]
25
ps
Peak[12]
100
200
ps
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