CY7C6431x
CY7C64345, CY7C6435x
Document Number: 001-12394 Rev. *F
Page 2 of 29
Functional Overview
The enCoRe V family of devices are designed to replace multiple
traditional full-speed USB microcontroller system components
with one, low cost single-chip programmable component.
Communication peripherals (I2C/SPI), a fast CPU, Flash
program memory, SRAM data memory, and configurable IO are
included in a range of convenient pinouts.
The architecture for this device family, as illustrated in enCoRe V
Block Diagram Block Diagram, is comprised of three main areas:
the CPU core, the system resources, and the full-speed USB
system. Depending on the enCoRe V package, up to 36 general
purpose IO (GPIO) are also included.
This product is an enhanced version of Cypress’ successful
full-speed USB peripheral controllers. Enhancements include
faster CPU at lower voltage operation, lower current
consumption, twice the RAM and Flash, hot-swappable IOs, I2C
hardware address recognition, new very low current sleep mode,
and new package options.
The enCoRe V Core
The enCoRe V Core is a powerful engine that supports a rich
instruction set. It encompasses SRAM for data storage, an
interrupt controller, sleep and watchdog timers, and IMO
(internal main oscillator) and ILO (internal low speed oscillator).
The CPU core, called the M8C, is a powerful processor with
speeds up to 24 MHz. The M8C is a four-MIPS, 8-bit Harvard
architecture microprocessor.
System resources provide additional capability, such as a config-
urable I2C slave and SPI master-slave communication interface
and various system resets supported by the M8C.
Additional System Resources
System resources, some of which have been previously listed,
provide additional capability useful to complete systems.
Additional resources include low voltage detection and power on
reset. Brief statements describing the merits of each system
resource are presented below.
■
Full-speed USB (12 Mbps) with nine configurable endpoints
and 512 bytes of dedicated USB RAM. No external components
are required except two series resistors. It is specified for
commercial temperature USB operation. For reliable USB
operation, ensure the supply voltage is between 4.35V and
5.25V, or around 3.3V.
■
10-bit on-chip ADC shared between system performance
manager (used to calculate parameters based on temperature
for flash write operations) and the user.
■
The I2C slave and SPI master-slave module provides 50, 100,
or 400 kHz communication over two wires. SPI communication
over 3 or 4 wires runs at speeds of 46.9 kHz to 3 MHz (lower
for a slower system clock).
■
In I2C slave mode, the hardware address recognition feature
reduces the already low power consumption by eliminating the
need for CPU intervention until a packet addressed to the target
device is received.
■
Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR (power
on reset) circuit eliminates the need for a system supervisor.
■
The 5V maximum input, 1.8, 2.5, or 3V selectable output, low
dropout regulator (LDO) provides regulation for IOs. A register
controlled bypass mode allows the user to disable the LDO.
■
Standard Cypress PSoC IDE tools are available for debugging
the enCoRe V family of parts.
Getting Started
The quickest path to understanding the PSoC silicon is by
reading this data sheet and using the PSoC Designer Integrated
Development Environment (IDE). This data sheet is an overview
of the PSoC integrated circuit and presents specific pin, register,
and electrical specifications. For in-depth information, along with
detailed programming information, reference the PSoC
Mixed-Signal Array Technical Reference Manual, which can be
found on http://www.cypress.com/psoc.
For up-to-date Ordering, Packaging, and Electrical Specification
information, reference the latest PSoC device data sheets on the
web at http://www.cypress.com.
Development Kits
Development Kits are available from the following distributors:
Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store
contains development kits, C compilers, and all accessories for
PSoC development. Go to the Cypress Online Store web site at
http://www.cypress.com/shop/. Under Product Categories click
PSoC® Mixed Signal Arrays to view a current list of available
items.
Technical Training Modules
Free PSoC technical training modules are available for users
new to PSoC. Training modules cover designing, debugging,
advanced analog and CapSense. Go to
http://www.cypress.com/techtrain.
Consultants
Certified PSoC Consultants offer everything from technical
assistance to completed PSoC designs. To contact or become a
PSoC Consultant go to http://www.cypress.com, click on Support
located at the top of the web page, and select CYPros
Consultants.
Technical Support
PSoC application engineers take pride in fast and accurate
response. They can be reached with a four hour guaranteed
response at http://www.cypress.com/support.
Application Notes
A long list of application notes assists you in every aspect of your
design effort. To view the PSoC application notes, go to the
http://www.cypress.com web site and select Application Notes
under the Documentation list located at the top of the web page.
Application notes are sorted by date by default.
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