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CY7C6431x
CY7C64345, CY7C6435x
Document Number: 001-12394 Rev. *F
Page 11 of 29
Register Reference
The section discusses the registers of the enCoRe V device. It lists all the registers in mapping tables, in address order.
Register Conventions
The register conventions specific to this section are listed in the
following table.
Register Mapping Tables
The enCoRe V device has a total register address space of 512
bytes. The register space is also referred to as IO space and is
broken into two parts: Bank 0 (user space) and Bank 1 (configu-
ration space). The XIO bit in the Flag register (CPU_F) deter-
mines which bank the user is currently in. When the XIO bit is
set, the user is said to be in the “extended” address space or the
“configuration” registers.
Table 4. Register Conventions
Convention
Description
R
Read register or bits
W
Write register or bits
O
Only a read/write register or bits
L
Logical register or bits
C
Clearable register or bits
#
Access is bit specific
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