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CY2305
CY2309
Document #: 38-07140 Rev. *I
Page 2 of 15
Pinouts
Figure 1. Pin Diagram - CY2305
Figure 2. Pin Diagram - CY2309
Table 1. Pin Description for CY2305
Pin
Signal
Description
1
REF[1]
Input reference frequency, 5V-tolerant input
2
CLK2[2]
Buffered clock output
3
CLK1[2]
Buffered clock output
4
GND
Ground
5
CLK3[2]
Buffered clock output
6VDD
3.3V supply
7
CLK4[2]
Buffered clock output
8
CLKOUT[2]
Buffered clock output, internal feedback on this pin
Table 2. Pin Description for CY2309
Pin
Signal
Description
1
REF[1]
Input reference frequency, 5V-tolerant input
2
CLKA1[2]
Buffered clock output, Bank A
3
CLKA2[2]
Buffered clock output, Bank A
4VDD
3.3V supply
5
GND
Ground
6
CLKB1[2]
Buffered clock output, Bank B
7
CLKB2[2]
Buffered clock output, Bank B
8
S2[3]
Select input, bit 2
9
S1[3]
Select input, bit 1
10
CLKB3[2]
Buffered clock output, Bank B
11
CLKB4[2]
Buffered clock output, Bank B
12
GND
Ground
1
2
3
4
5
8
7
6
REF
CLK2
CLK1
GND
VDD
CLKOUT
CLK4
CLK3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
REF
CLKA1
CLKA2
VDD
GND
CLKB1
CLKB2
S2
CLKOUT
CLKA4
CLKA3
VDD
GND
CLKB4
CLKB3
S1
Notes
1. Weak pull down.
2. Weak pull down on all outputs.
3. Weak pull ups on these inputs.
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