CY5057
Document #: 38-07363 Rev. *E
Page 2 of 10
Die Pad Description
Die Pad Summary [Pad coordinates are referenced from the center of the die (X = 0, Y = 0)]
Table 1. Die Pad Summary
Name
Die Pad
Description
X Coordinate
Y Coordinate
VDD
1,2
Power supply
–843.612
597.849, 427.266
VSS
6,7
Ground
883.743, 887.355
–563.304, –369.957
XIN
4
Crystal gate pin
–843.612
–1.806
XOUT
3
Crystal drain pin
–843.612
236.565
PD#/OE
5
Flash programmable to function as power down or output enable
in normal operating mode. Weak pull up is enabled by default
–843.612
–424.662
VPP
Super voltage when going into programming mode
SDA
Data pin when going into and when in programming mode
SSON#
10
Active low spread spectrum control. Asserting LOW turns the
internal modulation waveform on. Strong pull down is enabled by
default. Pull down is disabled in power down mode
834.183
589.848
SCL
Clock pin in programming mode. Must be double bonded to the
OUT pad for pinouts not using the SSON# function. There is an
internal pull down resistor on this pad
OUT
9
Clock output. There is an internal pull down resistor on this pad.
Weak pull down is enabled by default. Default output is from the
reference
834.183
462.840
NC
8
No connect pin (do not connect this pad)
834.183
335.832
Note
Active die size: X = 75.0 mils / 1907
μm
Bond pad opening: 85
μm x 85 μm
Pad pitch: 125
μm x 125 μm
(pad center to pad center)
Y = 56.2 mils / 1428
μm
Scribe: Y (horizontal) = 2.8 mils / 71
μm
X (vertical) = 3.4 mils / 86.2
μm
Wafer thickness: 11 mils and 29 mils TYPICAL (See
Ordering Information table for details)
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