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CY29973AXIT Datasheet(PDF) 7 Page - Cypress Semiconductor

Part # CY29973AXIT
Description  3.3V 125-MHz Multi-Output Zero Delay Buffer
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY29973AXIT Datasheet(HTML) 7 Page - Cypress Semiconductor

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CY29973
Document #: 38-07291 Rev. *C
Page 7 of 9
IDD
Dynamic Supply Current
QA and QB at 60 MHz,
QC at 120 MHz, CL=30 pF
–225
mA
QA and QB at 25 MHz,
QC at 50 MHz, CL=30 pF
–125
Cin
Input Pin Capacitance
4
pF
ZOUT
Output Impedance
15
18
22
Ω
AC Electrical Specifications V
DD = 2.9V to 3.6V, VDDC = 3.3V ±10%, TA = - 40°C to +85°C
[7]
Parameter
Description
Conditions
Min
Typ.
Max
Unit
Tr/Tf
TCLK Input Rise or Fall
3.0
ns
Fref
Reference Input Frequency
Note 8
Note 8
MHz
FrefDC
Reference Input Duty Cycle
25
75
%
Fvco
PLL VCO Lock Range
200
480
MHz
Tlock
Maximum PLL lock Time
10
ms
Tr/Tf
Output Clocks Rise or Fall Time[9]
0.8V to 2.0V
0.15
1.2
ns
Fout
Maximum Output Frequency
Q (
÷2)
125
MHz
Q (
÷4)
120
Q (
÷6)
80
Q (
÷8)
60
FoutDC
Output Duty Cycle[9]
TCYCLE/2 - 750
TCYCLE/2 + 750
ps
tpZL, tpZH
Output Enable Time[9](all outputs)
2–
10
ns
tpLZ, tpHZ
Output Disable Time[9](all outputs)
2–
8
ns
TCCJ
Cycle to Cycle Jitter[9](peak to peak)
–±100
ps
TSKEW
Any Output to Any Output Skew[9,10]
–250
350
ps
Propagation Delay[10,11] PECL_CLK
- 225
- 25
175
ps
Tpd
TCLK0
QFB =(³8)
- 70
130
330
TCLK1
- 130
70
270
Ordering Information
Part Number
Package Type
Production Flow
CY29973AI[12]
52-pin TQFP
Industrial, – 40°C to +85°C
CY29973AIT[12]
52-pin TQFP– Tape and reel
Industrial, - 40°C to +85°C
Pb-Free
CY29973AXI
52-pin TQFP
Industrial, - 40°C to +85°C
CY29973AXIT
52-pin TQFP – Tape and reel
Industrial, - 40°C to +85°C
DC Electrical Specifications V
DD = 2.9V to 3.6V, VDDC = 3.3V ±10%, TA = - 40°C to +85°C (continued)
Parameter
Description
Conditions
Min
Typ.
Max
Unit
Notes
7. Parameters are guaranteed by design and characterization. Not 100% tested in production.
8. Maximum and minimum input reference is limited by VC0 lock range.
9. Outputs loaded with 30pF each.
10. 50
Ω transmission line terminated into VDD/2.
11. Tpd is specified for a 50MHz input reference. Tpd does not include jitter.
12. Not recommended for new designs.
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