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HEF40098BT Datasheet(PDF) 3 Page - NXP Semiconductors |
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HEF40098BT Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 12 page HEF40098B_5 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 05 — 31 October 2008 3 of 12 NXP Semiconductors HEF40098B 3-state hex inverting buffer 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF state. 8. Limiting values [1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. Table 2. Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) 1A0, 1A1, 1A2, 1A3 2, 4, 6, 10 buffer input 1Y0, 1Y1, 1Y2, 1Y3 3, 5, 7, 9 buffer output (active LOW) VSS 8 supply voltage 2Y0, 2Y1 13, 11 buffer output (active LOW) 2A0, 2A1 14, 12 buffer input 2OE 15 output enable input (active LOW) VDD 16 supply voltage Table 3. Function table[1] Inputs Output nAn nOE nYn HL L LLH XH Z Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDD supply voltage −0.5 +18 V IIK input clamping current VI < 0.5 V or VI >VDD + 0.5 V - ±10 mA VI input voltage −0.5 VDD + 0.5 V IOK output clamping current VO < 0.5 V or VO >VDD + 0.5 V - ±10 mA II/O input/output current - ±10 mA IDD supply current - 50 mA Tstg storage temperature −65 +150 °C Tamb ambient temperature −40 +85 °C Ptot total power dissipation Tamb = −40 to +85 °C DIP16 package [1] - 750 mW SO16 package [2] - 500 mW P power dissipation - 100 mW |
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