LPC2377 datasheet(2/55 Pages) NXP

Part #	LPC2377

Description	Single-chip 16-bit/32-bit microcontroller; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC

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Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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LPC2377_78_4

Product data sheet

Rev. 04 — 19 November 2008

2 of 55

NXP Semiconductors

LPC2377/78

Single-chip 16-bit/32-bit microcontroller

I General Purpose DMA controller (GPDMA) on AHB that can be used with the SSP

serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card

port, as well as for memory-to-memory transfers.

I Serial Interfaces:

N Ethernet MAC with associated DMA controller. These functions reside on an

independent AHB.

N USB 2.0 full-speed device with on-chip PHY and associated DMA controller

(LPC2378 only).

N Four UARTs with fractional baud rate generation, one with modem control I/O, one

with IrDA support, all with FIFO.

N CAN controller with two channels (LPC2378 only).

N SPI controller.

N Two SSP controllers with FIFO and multi-protocol capabilities. One is an alternate

for the SPI port, sharing its interrupt and pins. These can be used with the GPDMA

controller.

N Three I2C-bus interfaces (one with open-drain and two with standard port pins).

N I2S (Inter-IC Sound) interface for digital audio input or output. It can be used with

the GPDMA.

I Other peripherals:

N SD/MMC memory card interface.

N 104 General purpose I/O pins with conﬁgurable pull-up/down resistors.

N 10-bit ADC with input multiplexing among 8 pins.

N 10-bit DAC.

N Four general purpose timers/counters with 8 capture inputs and 10 compare

outputs. Each timer block has an external count input.

N One PWM/timer block with support for three-phase motor control. The PWM has

two external count inputs.

N Real-Time Clock (RTC) with separate power pin, clock source can be the RTC

oscillator or the APB clock.

N 2 kB SRAM powered from the RTC power pin, allowing data to be stored when the

rest of the chip is powered off.

N WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,

the RTC oscillator, or the APB clock.

I Standard ARM test/debug interface for compatibility with existing tools.

I Emulation trace module supports real-time trace.

I Single 3.3 V power supply (3.0 V to 3.6 V).

I Three reduced power modes: idle, sleep, and power-down.

I Four external interrupt inputs conﬁgurable as edge/level sensitive. All pins on PORT0

and PORT2 can be used as edge sensitive interrupt sources.

I Processor wake-up from Power-down mode via any interrupt able to operate during

Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet

wake-up interrupt).

I Two independent power domains allow ﬁne tuning of power consumption based on

needed features.

I Each peripheral has its own clock divider for further power saving.

I Brownout detect with separate thresholds for interrupt and forced reset.

I On-chip power-on reset.

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