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PCA9518AD Datasheet(PDF) 6 Page - NXP Semiconductors |
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PCA9518AD Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 23 page PCA9518A_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 3 December 2008 6 of 23 NXP Semiconductors PCA9518A Expandable 5-channel I2C-bus hub Standard-mode devices and multiple masters are possible. Please see application note AN255, I2C/SMBus Repeaters, Hubs and Expanders for additional information on sizing resistors. 7. Application design-in information A typical application is shown in Figure 5. In this example, the system master is running on a 3.3 V I2C-bus while the slaves are connected to a 3.3 V or 5 V bus. All buses run at 100 kHz unless slave 3, slave 4 and slave 5 are isolated from the bus. Then the master bus and slave 1, slave 2 and slave 6 can run at 400 kHz. Any segment of the hub can talk to any other segment of the hub. Bus masters and slaves can be located on any segment with 400 pF load allowed on each segment. The PCA9518A is 5 V tolerant, so it does not require any additional circuitry to translate between the different bus voltages. When one port of the PCA9518A is pulled LOW by a device on the I2C-bus, a CMOS hysteresis type input detects the falling edge and drives the EXPxxx1 line LOW, when the EXPxxx1 voltage is less than 0.5VDD, the other ports are pulled down to the VOL of the PCA9518A which is typically 0.5 V. |
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