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AT91FR40162S Datasheet(PDF) 6 Page - ATMEL Corporation |
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AT91FR40162S Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 18 page 6 6174AS–ATARM–25-May-05 AT91FR40162S 5. Architectural Overview The AT91FR40162S integrates Atmel’s AT91R40008 ARM Thumb processor and a 2-Mbyte (16-Mbit) Flash memory die in a single compact 121-ball BGA package. The address, data and control signals, except the Flash memory enable, are internally interconnected. The AT91R40008 architecture consists of two main buses, the Advanced System Bus (ASB) and the Advanced Peripheral Bus (APB). Designed for maximum performance and controlled by the memory controller, the ASB interfaces the ARM7TDMI processor with the on-chip 32-bit SRAM memory, the External Bus Interface (EBI) connected to the encapsulated Flash and the AMBA™ Bridge. The AMBA Bridge drives the APB, which is designed for accesses to on-chip peripherals and optimized for low power consumption. The AT91FR40162S implements the ICE port of the ARM7TDMI processor on dedicated pins, offering a complete, low-cost and easy-to-use debug solution for target debugging. 5.1 Memories The AT91FR40162S embeds 256K bytes of internal SRAM. The internal memory is directly connected to the 32-bit data bus and is single-cycle accessible. This provides maximum per- formance of 67 MIPS at 75 MHz by using the ARM instruction set of the processor, minimizing system power consumption and improving on the performance of separate memory solutions. The AT91FR40162S features an External Bus Interface (EBI), which enables connection of external memories and application-specific peripherals. The EBI supports 8- or 16-bit devices and can use two 8-bit devices to emulate a single 16-bit device. The EBI implements the early read protocol, enabling faster memory accesses than standard memory interfaces. The AT91FR40162S encapsulates a Flash memory organized as 1024K 16-bit words, accessed via the EBI. A 16-bit Thumb instruction can be loaded from Flash memory in a single access. Separate MCU and Flash memory reset inputs (NRST and NRSTF) are provided for maximum flexibility. The user is thus free to tailor the reset operation to the application. The AT91FR40162S integrates resident boot software called AT91 Flash Memory Uploader software in the encapsulated Flash. The AT91 Flash Memory Uploader software is able to upload program application software into its Flash memory. 5.2 Peripherals The AT91FR40162S integrates several peripherals, which are classified as system or user peripherals. All on-chip peripherals are 32-bit accessible by the AMBA Bridge, and can be programmed with a minimum number of instructions. The peripheral register set is composed of control, mode, data, status and enable/disable/status registers. An on-chip Peripheral Data Controller (PDC) transfers data between the on-chip USARTs and on- and off-chip memory address space without processor intervention. Most importantly, the PDC removes the processor interrupt handling overhead, making it possible to transfer up to 64K contiguous bytes without reprogramming the start address, thus increasing the perfor- mance of the microcontroller, and reducing the power consumption. |
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