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AT91SAM9260 Datasheet(PDF) 2 Page - ATMEL Corporation |
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AT91SAM9260 Datasheet(HTML) 2 Page - ATMEL Corporation |
2 / 47 page 2 6221IS–ATARM–12-Aug-08 AT91SAM9260 • Debug Unit (DBGU) – 2-wire UART and Support for Debug Communication Channel, Programmable ICE Access Prevention • Periodic Interval Timer (PIT) – 20-bit Interval Timer plus 12-bit Interval Counter • Watchdog Timer (WDT) – Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock • Real-time Timer (RTT) – 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler • One 4-channel 10-bit Analog-to-Digital Converter • Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC) – 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os – Input Change Interrupt Capability on Each I/O Line – Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output – High-current Drive I/O Lines, Up to 16 mA Each • Peripheral DMA Controller Channels (PDC) • One Two-slot MultiMedia Card Interface (MCI) – SDCard/SDIO and MultiMediaCard™ Compliant – Automatic Protocol Control and Fast Automatic Data Transfers with PDC • One Synchronous Serial Controller (SSC) – Independent Clock and Frame Sync Signals for Each Receiver and Transmitter – I²S Analog Interface Support, Time Division Multiplex Support – High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer • Four Universal Synchronous/Asynchronous Receiver Transmitters (USART) – Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation, Manchester Encoding/Decoding – Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support – Full Modem Signal Control on USART0 • Two 2-wire UARTs • Two Master/Slave Serial Peripheral Interfaces (SPI) – 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects – Synchronous Communications • Two Three-channel 16-bit Timer/Counters (TC) – Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel – Double PWM Generation, Capture/Waveform Mode, Up/Down Capability – High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2 • One Two-wire Interface (TWI) – Master, Multi-master and Slave Mode Operation – General Call Supported in Slave Mode • IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins • Required Power Supplies: – 1.65V to 1.95V for VDDBU, VDDCORE and VDDPLL – 1.65V to 3.6V for VDDIOP1 (Peripheral I/Os) – 3.0V to 3.6V for VDDIOP0 and VDDANA (Analog-to-digital Converter) – Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os) • Available in a 208-lead PQFP Green and a 217-ball LFBGA Green Package |
Similar Part No. - AT91SAM9260_08 |
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Similar Description - AT91SAM9260_08 |
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