 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AT91SAM9XE128 Datasheet(PDF) 2 Page - ATMEL Corporation |
|
||||||||||||||||||||||||||||||
AT91SAM9XE128 Datasheet(HTML) 2 Page - ATMEL Corporation |
|
|
2 / 50 page  2 6254AS–ATARM–14-Feb-08 AT91SAM9XE128/256/512 Preliminary • Reset Controller (RSTC) – Based on a Power-on Reset Cell, Reset Source Identification and Reset Output Control • Clock Generator (CKGR) – Selectable 32,768 Hz Low-power Oscillator or Internal Low Power RC Oscillator on Battery Backup Power Supply, Providing a Permanent Slow Clock – 3 to 20 MHz On-chip Oscillator, One Up to 240 MHz PLL and One Up to 100 MHz PLL • Power Management Controller (PMC) – Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities – Two Programmable External Clock Signals • Advanced Interrupt Controller (AIC) – Individually Maskable, Eight-level Priority, Vectored Interrupt Sources – Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected • Debug Unit (DBGU) – 2-wire UART and support for Debug Communication Channel, Programmable ICE Access Prevention • Periodic Interval Timer (PIT) – 20-bit Interval Timer Plus 12-bit Interval Counter • Watchdog Timer (WDT) – Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock • Real-Time Timer (RTT) – 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler • One 4-channel 10-bit Analog to Digital Converter • Three 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC,) – 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os – Input Change Interrupt Capability on Each I/O Line – Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output • Peripheral DMA Controller Channels (PDC) • Two-slot Multimedia Card Interface (MCI) – SDCard/SDIO and MultiMediaCard™ Compliant – Automatic Protocol Control and Fast Automatic Data Transfers with PDC • One Synchronous Serial Controllers (SSC) – Independent Clock and Frame Sync Signals for Each Receiver and Transmitter – I²S Analog Interface Support, Time Division Multiplex Support – High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer • Four Universal Synchronous/Asynchronous Receiver Transmitters (USART) – Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation – Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support – Full Modem Signal Control on USART0 • One 2-wire UART • Two Master/Slave Serial Peripheral Interface (SPI) – 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects – Synchronous Communications • Two Three-channel 16-bit Timer/Counters (TC) – Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel – Double PWM Generation, Capture/Waveform Mode, Up/Down Capability – High-Drive Capability on Outputs TIOA0, TIOA1, TIOA2 • Two Two-wire Interfaces (TWI) – Master, Multi-master and Slave Mode Operation – General Call Supported in Slave Mode – Connection to PDC Channel to Optimize Data Transfers in Master Mode Only |
Similar Part No. - AT91SAM9XE128 |
|
Similar Description - AT91SAM9XE128 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
